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UPD78F9234MC-5A4-A Datasheet, PDF (170/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
CHAPTER 10 A/D CONVERTER
(1) A/D converter mode register (ADM)
This register sets the conversion time for analog input to be A/D converted, and starts/stops conversion.
ADM can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 10-3. Format of A/D Converter Mode Register (ADM)
Address: FF80H After reset: 00H R/W
Symbol
<7>
6
5
4
3
2
ADM
ADCS
0
FR2
FR1
FR0
0
1
<0>
0
ADCE
ADCS
0
1Note 1
Stops conversion operation
Starts conversion operation
A/D conversion operation control
FR2
0
1
1
1
0
0
1
0
FR1
0
0
1
0
1
0
1
1
FR0
0
0
0
1
0
1
1
1
Reference Sampling Conversion fXP = 8 MHz
fXP = 10 MHz
Voltage TimeNote 3
RangeNote 2
TimeNote 4 Sampling Conversion Sampling Conversion
TimeNote 3 TimeNote 4 TimeNote 3 TimeNote 4
AVREF ≥ 12/fXP
4.5 V
36/fXP
1.5 μs
4.5 μs 1.2 μs 3.6 μs
AVREF ≥ 24/fXP
4.0 V
72/fXP
3.0 μs
9.0 μs 2.4 μs 7.2 μs
AVREF ≥ 96/fXP
2.85 V 48/fXP
144/fXP
96/fXP
12.0 μs 18.0 μs 9.6 μs
6.0 μs 12.0 μs 4.8 μs
14.4 μs
9.6 μs
48/fXP 72/fXP 6.0 μs 9.0 μs 4.8 μs 7.2 μs
24/fXP
48/fXP
3.0 μs
6.0 μs
Setting Setting
prohibited prohibited
Note 5
Note 5
AVREF ≥ 176/fXP
2.7 V
88/fXP
224/fXP
112/fXP
22.0 μs
11.0 μs
28.0 μs
14.0 μs
(2.4 μs) (4.8 μs)
17.6 μs 22.4 μs
Setting Setting
prohibited prohibited
Note 5
Note 5
(8.8 μs) (11.2 μs)
ADCE
0Note 1
Stops operation of comparator
Comparator operation controlNote 6
1
Enables operation of comparator
Remarks 1. fXP: Oscillation frequency of clock to peripheral hardware
2. The conversion time refers to the total of the sampling time and the time from successively
comparing with the sampling value until the conversion result is output.
Note 1. Even when the ADCE = 0 (comparator operation stopped), the A/D conversion operation starts if
the ADCS is set to 1. However, the first conversion data is out of the guaranteed-value range, so
ignore it.
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User’s Manual U17446EJ5V0UD