UPD78F9234MC-5A4-A Datasheet, PDF (173/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 10 A/D CONVERTER
(4) 8-bit A/D conversion result register (ADCRH)
This register is an 8-bit register that stores the A/D conversion result. It stores the higher 8 bits of a 10-bit
resolution result.
ADCRH can be read by an 8-bit memory manipulation instruction.
Reset signal generation makes ADCRH undefined.
Figure 10-7. Format of 8-bit A/D Conversion Result Register (ADCRH)
Address: FF1AH After reset: Undefined R
Symbol
7
6
5
4
3
2
1
0
ADCRH
(5) Port mode control register 2 (PMC2) and port mode register 2 (PM2)
When using the P20/ANI0 to P23/ANI3 pins for analog input, set PMC20 to PMC23 and PM20 to PM23 to 1. At
this time, the output latches of P20 to P23 may be 0 or 1.
PMC2 and PM2 are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears PMC2 to 00H and sets PM2 to FFH.
Figure 10-8. Format of Port Mode Control Register 2 (PMC2)
Address: FF84H After reset: 00H R/W
Symbol
7
6
5
PMC2
0
0
0
4
3
2
1
0
0
PMC23
PMC22
PMC21
PMC20
PMC2n
0
1
Port mode
A/D converter mode
Operation mode specification (n = 0 to 3)
Caution When PMC20 to PMC23 are set to 1, the P20/ANI0 to P23/ANI3 pins cannot be used as port
pins. Be sure to set the pull-up resistor option registers (PU20 to PU23) to 0 for the pins
set to A/D converter mode.
Figure 10-9. Format of Port Mode Register 2 (PM2)
Address: FF22H After reset: FFH R/W
Symbol
7
6
5
PM2
1
1
1
4
3
2
1
0
1
PM23
PM22
PM21
PM20
PM2n
0
1
Pmn pin I/O mode selection (n = 0 to 3)
Output mode (output buffer on)
Input mode (output buffer off)
User’s Manual U17446EJ5V0UD
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