UPD78F9234MC-5A4-A Datasheet, PDF (231/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 13 INTERRUPT FUNCTIONS
(1) Interrupt request flag registers 0, 1 (IF0, IF1)
An interrupt request flag is set to 1 when the corresponding interrupt request is issued, or when the
instruction is executed. It is cleared to 0 by executing an instruction when the interrupt request is
acknowledged or when a reset signal is generated.
IF0 and IF1 are set with a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears IF0 and IF1 to 00H.
Figure 13-2. Format of Interrupt Request Flag Registers 0, 1 (IF0, IF1)
Address: FFE0H After reset: 00H R/W
Symbol <7>
<6>
<5>
<4>
<3>
<2>
<1>
0
IF0
ADIF TMIF010 TMIF000 TMIFH1 PIF1
PIF0
LVIIF
0
Address: FFE1H After reset: 00H R/W
Symbol
7
<6>
<5>
<4>
<3>
<2>
<1>
0
IF1
0
STIF6
SRIF6 SREIF6 TMIF80
PIF3
PIF2
0
××IF×
0
1
Interrupt request flag
No interrupt request signal has been issued.
An interrupt request signal has been issued; an interrupt request status.
Caution
Because P30, P31, P41, and P43 have an alternate function as external interrupt inputs,
when the output level is changed by specifying the output mode of the port function, an
interrupt request flag is set. Therefore, the interrupt mask flag should be set to 1 before
using the output mode.
User’s Manual U17446EJ5V0UD
229