UPD78F9234MC-5A4-A Datasheet, PDF (254/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 15 RESET FUNCTION
Figure 15-4. Reset Timing by RESET Input in STOP Mode
<1> With high-speed internal oscillation clock or external clock input
STOP instruction is executed.
High-speed internal oscillation clock or
external clock input
CPU clock
Normal
operation
in progress
RESET
Stop status
Reset period
(oscillation stops) (oscillation stops)
Internal reset signal
Port pin
(except P130)
Port pin
(P130)
Delay
100 ns (TYP.)
Delay
100 ns (TYP.)
Normal operation (reset processing, CPU clock)
Operation stops because option
byte is referenced^{Note 1}.
Hi-Z
Note 2
Notes 1. The operation stop time is 277 μs (MIN.), 544 μs (TYP.), and 1.075 ms (MAX.).
2. Set high level output using software.
Remark When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
<2> With crystal/ceramic oscillation clock
STOP instruction is executed.
Crystal/ceramic
oscillation clock
Normal
CPU clock operation
in progress
RESET
Stop status
Reset period
(oscillation stops) (oscillation stops)
Oscillation stabilization
time (2¹⁰/fX to 2¹⁷/fX)
Normal operation
(reset processing, CPU clock)
Operation stops because option
byte is referenced^{Note 1}.
Internal reset signal
Port pin
(except P130)
Delay
100 ns (TYP.)
Delay
100 ns (TYP.)
Hi-Z
Port pin
(P130)
Notes 1. The operation stop time is 276 μs (MIN.), 544 μs (TYP.), and 1.074 ms (MAX.).
2. Set high level output using software.
Note 2
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User’s Manual U17446EJ5V0UD