UPD78F9234MC-5A4-A Datasheet, PDF (285/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Figure 19-8. Block Diagram of Self Programming
Protect byte
Internal bus
Flash programming command
register (FLCMD)
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0 FLCMD2 FLCMD1 FLCMD0
Self programming mode
setting sequencer
5
3
HALT signal
Flash programming mode
control register (FLPMC)
Flash protect command
register (PFCMD)
Self programming mode setting register
Increment
circuit
Self programming command execution
Flash memory controller
Erase
circuit
Write
circuit
Verify
circuit
HALT release signal
Flash address
pointer H (FLAPH)
Matched
Flash address
pointer L (FLAPL)
Matched
Flash memory
Not matched
Flash address pointer H
compare register
(FLAPHC)
Flash address pointer L
compare register
(FLAPLC)
Flash write buffer register
(FLW)
Internal bus
WEPRERR VCERR FPRERR
Flash status register (PFS)