UPD78F9234MC-5A4-A Datasheet, PDF (291/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 19 FLASH MEMORY
(4) Flash programming command register (FLCMD)
This register is used to specify whether the flash memory is erased, written, or verified in the self programming
mode.
This register is set with a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 19-13. Format of Flash Programming Command Register (FLCMD)
Address: FFA3H After reset: 00H R/W
Symbol
7
6
5
4
FLCMD
0
0
0
0
3
2
1
0
0
FLCMD2 FLCMD1 FLCMD0
FLCMD2 FLCMD1 FLCMD0 Command Name
Function
0
0
1
Internal verify 1 This command is used to check if
data has been correctly written to the
flash memory. It is used to check
whether data has been written to an
entire block. If an error occurs, bit 1
(VCERR) or bit 2 (WEPRERR) of the
flash status register (PFS) is set to 1.
0
1
0
Internal verify 2 This command is used to check if
data has been correctly written to the
flash memory. It is used to check
whether data has been written to
multiple addresses in the same block.
If an error occurs, bit 1 (VCERR) or
bit 2 (WEPRERR) of the flash status
register (PFS) is set to 1.
0
1
1
Block erase
This command is used to erase
specified block. It is used both in the
on-board mode and self
programming mode.
1
0
0
Block blank check This command is used to check if the
specified block has been erased.
1
0
1
Byte write
This command is used to write 1-byte
data to the specified address in the
flash memory. Specify the write
address and write data, then execute
this command.
If 1 is written to a bit that has not
been erased (a bit for which the data
is 0), then bit 2 (WEPRERR) of the
flash status register (PFS) becomes
1.
Other than above^Note
Setting prohibited
Note If any command other than those above is executed, command execution may immediately be
terminated, and bits 1 and 2 (WEPRERR and VCERR) of the flash status register (PFS) may be set
to 1.
User’s Manual U17446EJ5V0UD
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