UPD78F9234MC-5A4-A Datasheet, PDF (243/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 14 STANDBY FUNCTION
14.2 Standby Function Operation
14.2.1 HALT mode
(1) HALT mode
The HALT mode is set by executing the HALT instruction.
The operating statuses in the HALT mode are shown below.
Caution Because an interrupt request signal is used to clear the standby mode, if there is an interrupt
source with the interrupt request flag set and the interrupt mask flag clear, the standby mode
is immediately cleared if set.
Table 14-2. Operating Statuses in HALT Mode
Item
Setting of HALT Mode
Low-Speed Internal
Oscillator Cannot Be
Stopped^Note
Low-Speed Internal Oscillator Can Be Stopped^Note
When Low-Speed Internal When Low-Speed Internal
Oscillation Continues
Oscillation Stops
System clock
Clock supply to CPU is stopped.
CPU
Operation stops.
Port (latch)
Holds status before HALT mode was set.
16-bit timer/event counter 00
Operable
8-bit timer 80
8-bit timer
H1
Sets count clock to fXP to fXP/2¹²
Sets count clock to fRL/2⁷
Operable
Operable
Operable
Operable
Operation stops.
Watchdog System clock selected as
timer
operating clock
Setting prohibited
Operation stops.
“Low-speed internal oscillation
clock” selected as operating
clock
Operable (Operation
continues.)
Operation stops.
A/D converter
Operable
Serial interface UART6
Operable
Power-on-clear circuit
Always operates.
Low-voltage detector
Operable
External interrupt
Operable
Note “Cannot be stopped” or “Stopped by software” is selected for low-speed internal oscillator by the option byte
(for the option byte, see CHAPTER 18 OPTION BYTE).
User’s Manual U17446EJ5V0UD
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