UPD78F9234MC-5A4-A Datasheet, PDF (260/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 16 POWER-ON-CLEAR CIRCUIT
16.4 Cautions for Power-on-Clear Circuit
In a system where the supply voltage (VDD) fluctuates for a certain period in the vicinity of the POC detection
voltage (VPOC), the system may be repeatedly reset and released from the reset status. In this case, the time from
release of reset to the start of the operation of the microcontroller can be arbitrarily set by taking the following action.
<Action>
After releasing the reset signal, wait for the supply voltage fluctuation period of each system by means of a
software counter that uses a timer, and then initialize the ports.
Figure 16-3. Example of Software Processing After Release of Reset (1/2)
• If supply voltage fluctuation is 50 ms or less in vicinity of POC detection voltage
Reset
Initialization
processing <1>
Power-on-clear
Setting 8-bit timer H1
(50 ms is measured)
; Check reset source^{Note 2}
Initialization of ports
Setting WDT
; fXP = High-speed internal oscillation clock (8.4 MHz (MAX.))/2² (default value)
Source: fXP (2.1 MHz (MAX.))/2¹²,
51 ms when the compare value is 25
Timer starts (TMHE1 = 1)
Note 1
Clears WDT
No
50 ms has passed?
(TMIFH1 = 1?)
Yes
Initialization
processing <2>
; Setting the division ratio of the system clock,
timer, A/D converter, etc.
Notes 1. If reset is generated again during this period, initialization processing <2> is not started.
2. A flowchart is shown on the next page.
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User’s Manual U17446EJ5V0UD