UPD78F9234MC-5A4-A Datasheet, PDF (301/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 19 FLASH MEMORY
19.8.6 Example of block erase operation in self programming mode
An example of the block erase operation in self programming mode is explained below.
<1> Set 03H (block erase) to the flash program command register (FLCMD).
<2> Set the block number to be erased, to flash address pointer H (FLAPH).
<3> Set flash address pointer L (FLAPL) to 00H.
<4> Write the same value as FLAPH to the flash address pointer H compare register (FLAPHC).
<5> Set the flash address pointer L compare register (FLAPLC) to 00H.
<6> Clear the flash status register (PFS).
<7> Write ACH to the watchdog timer enable register (WDTE) (clear and restart the watchdog timer counter)^{Note 1}.
<8> Execute the HALT instruction then start self programming. (Execute an instruction immediately after the
HALT instruction if self programming has been executed.)
<9> Check if a self programming error has occurred using bit 1 (VCERR) and bit 2 (WEPRERR) of PFS^{Note 2}.
Abnormal → <10>
Normal → <12>
<R>
<10> If the number of times the erase command can be executed has not been exceeded, return to step <6> and
re-execute the command. If the number of times the erase command can be executed has been exceeded,
block erasure ends abnormally.
<11> Block erase processing is abnormally terminated.
<12> Block erase processing is normally terminated.
Notes 1. This setting is not required when the watchdog timer is not used.
<R>
2. Separately check the WEPRERR bit to check for errors in executing the erase command on a write-
prohibited area.
User’s Manual U17446EJ5V0UD
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