UPD78F9234MC-5A4-A Datasheet, PDF (107/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
(1) Pulse width measurement with free-running counter and one capture register
Specify both the rising and falling edges as the valid edges of the TI000 pin, by using bits 4 and 5 (ES000 and
ES010) of PRM00.
When 16-bit timer counter 00 (TM00) is operated in free-running mode, and the valid edge specified by
PRM00 is input, the value of TM00 is taken into 16-bit timer capture/compare register 010 (CR010) and an
external interrupt request signal (INTTM010) is set.
Sampling is performed using the count clock selected by PRM00, and a capture operation is only performed
when a valid level of the TI000 pin is detected twice, thus eliminating noise with a short pulse width.
Caution The measurable pulse width in this operation example is up to 1 cycle of the timer counter.
Figure 6-18. Control Register Settings for Pulse Width Measurement with Free-Running Counter
and One Capture Register (When TI000 and CR010 Are Used)
(a) Capture/compare control register 00 (CRC00)
7
6
5
4
3 CRC002 CRC001 CRC000
CRC00 0
0
0
0
0
1 0/1 0
CR000 used as compare register
CR010 used as capture register
(b) Prescaler mode register 00 (PRM00)
ES101 ES100 ES010 ES000 3
PRM00 0/1 0/1 1
1
0
2 PRM001 PRM000
0 0/1 0/1
Selects count clock (setting “11” is prohibited).
Specifies both edges for pulse width detection.
Setting invalid (setting “10” is prohibited.)
(c) 16-bit timer mode control register 00 (TMC00)
7
6
5
4 TMC003 TMC002 TMC001 OVF00
TMC00 0
0
0
0
0
1 0/1 0
Free-running mode
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
See the description of the respective control registers for details.
User’s Manual U17446EJ5V0UD
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