UPD78F9234MC-5A4-A Datasheet, PDF (312/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 19 FLASH MEMORY
Figure 19-24. Example of Internal Verify 2 Operation in Self Programming Mode
Internal verify 2
<1> Set internal verify 2
command (FLCMD = 02H)
<2> Set block no. for
internal verify, to FLAPH
<3> Sets FLAPL to the start address
<4> Set the same value as
that of FLAPH to FLAPHC
<5> Sets FLAPLC to the end address
<6> Clear PFS
<7> Clear & restart WDT counter
(WDTE = ACH)^Note
<8> Execute HALT instruction
<9> Check execution result
(VCERR and WEPRERR flags)
Normal
<11> Normal termination
Abnormal
<10> Abnormal termination
Note This setting is not required when the watchdog timer is not used.
Remark <1> to <11> in Figure 19-24 correspond to <1> to <11> of internal verify 2 in 19.8.9 (the page before
last).
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User’s Manual U17446EJ5V0UD