UPD78F9234MC-5A4-A Datasheet, PDF (76/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATORS
Figure 5-1. Block Diagram of Clock Generators
Internal bus
Oscillation stabilization
time select register (OSTS)
Preprocessor clock
control register (PPCC)
Processor clock
control register (PCC)
OSTS1 OSTS0
PPCC1 PPCC0
PCC1
X1/P121
X2/P122
System clock oscillation
stabilization time counter
STOP
System clock
oscillator^Note
Crystal/ceramic
oscillation
fX
External clock
input
Watchdog timer
Prescaler
fX
fX
2
2²
High-speed
internal
oscillation
fXP
2²
fXP
Prescaler
Controller
C
CPU clock
P
(fCPU)
U
Low-speed _fRL
internal
oscillator
Clock to peripheral
hardware (fXP)
8-bit timer H1,
watchdog timer
Option byte
1: Cannot be stopped.
0: Can be stopped.
LSRSTOP
Low-speed internal oscillation
mode register (LSRCM)
Internal bus
Note Select the high-speed internal oscillator, crystal/ceramic oscillator, or external clock input as the system
clock source by using the option byte.
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User’s Manual U17446EJ5V0UD