UPD78F9234MC-5A4-A Datasheet, PDF (235/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 13 INTERRUPT FUNCTIONS
13.4 Interrupt Servicing Operation
13.4.1 Maskable interrupt request acknowledgment operation
A maskable interrupt request can be acknowledged when the interrupt request flag is set to 1 and the
corresponding interrupt mask flag is cleared to 0. If the interrupt enabled status is in effect (when the IE flag is set to
1), then the request is acknowledged as a vector interrupt.
The time required to start the vectored interrupt servicing after a maskable interrupt request has been generated is
shown in Table 13-3.
See Figures 13-8 and 13-9 for the interrupt request acknowledgment timing.
Table 13-3. Time from Generation of Maskable Interrupt Request to Servicing
Minimum Time
9 clocks
Maximum Time^Note
19 clocks
Note The wait time is maximum when an interrupt
request is generated immediately before BT and
BF instructions.
1
Remark 1 clock: _fCPU (fCPU: CPU clock)
When two or more maskable interrupt requests are generated at the same time, they are acknowledged starting
from the interrupt request assigned the highest priority.
A pending interrupt is acknowledged when a status in which it can be acknowledged is set.
Figure 13-7 shows the algorithm of interrupt request acknowledgment.
When a maskable interrupt request is acknowledged, the contents of the PSW and PC are saved to the stack in
that order, the IE flag is reset to 0, and the data in the vector table determined for each interrupt request is loaded to
the PC, and execution branches.
To return from interrupt servicing, use the RETI instruction.
User’s Manual U17446EJ5V0UD
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