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UPD78F9234MC-5A4-A Datasheet, PDF (192/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
CHAPTER 11 SERIAL INTERFACE UART6
Figure 11-5. Format of Asynchronous Serial Interface Operation Mode Register 6 (ASIM6) (2/2)
TXE6Note 1
0
1
Enabling/disabling transmission
Disable transmission (synchronously reset the transmission circuit).
Enable transmission
RXE6Note 2
0
1
Enabling/disabling reception
Disable reception (synchronously reset the reception circuit).
Enable reception
PS61
0
0
1
1
PS60
0
1
0
1
Transmission operation
Parity bit not output.
Output 0 parity.
Output odd parity.
Output even parity.
Reception operation
Reception without parity
Reception as 0 parityNote 3
Judge as odd parity.
Judge as even parity.
CL6
Specification of character length of transmit/receive data
0
Character length of data = 7 bits
1
Character length of data = 8 bits
SL6
Specification of number of stop bits of transmit data
0
Number of stop bits = 1
1
Number of stop bits = 2
ISRM6
0
1
Enabling/disabling occurrence of reception completion interrupt in case of error
“INTSRE6” occurs in case of error (at this time, INTSR6 does not occur).
“INTSR6” occurs in case of error (at this time, INTSRE6 does not occur).
Notes 1.
2.
3.
TXE6 is synchronized by the base clock (fXCLK6) set by CKSR6. When re-enabling transmission
operation, set TXE6 to 1 after having set TXE6 to 0 and one clock of the base clock (fXCLK6) has
elapsed. If TXE6 is set to 1 before one clock of the base clock (fXCLK6) has elapsed, the transmission
circuit may not able to be initialized.
RXE6 is synchronized by the base clock (fXCLK6) set by CKSR6. When re-enabling reception operation,
set RXE6 to 1 after having set RXE6 to 0 and one clock of the base clock (fXCLK6) has elapsed. If
RXE6 is set to 1 before one clock of the base clock (fXCLK6) has elapsed, the reception circuit may not
be able to be initialized.
If “reception as 0 parity” is selected, the parity is not judged. Therefore, bit 2 (PE6) of asynchronous
serial interface reception error status register 6 (ASIS6) is not set and the error interrupt does not
occur.
Caution
1. At startup, transmission operation is started by setting TXE6 to 1 after having set POWER6 to
1, then setting the transmit data to TXB6 after having waited for one clock or more of the
base clock (fXCLK6). When stopping transmission operation, set POWER6 to 0 after having set
TXE6 to 0.
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User’s Manual U17446EJ5V0UD