UPD78F9234MC-5A4-A Datasheet, PDF (52/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 3 CPU ARCHITECTURE
3.4.6 Based addressing
[Function]
8-bit immediate data is added to the contents of the base register, that is, the HL register pair, and the sum is
used to address the memory. Addition is performed by expanding the offset data as a positive number to 16 bits.
A carry from the 16th bit is ignored. This addressing can be carried out for all the memory spaces.
[Operand format]
Identifier
−
[HL+byte]
Description
[Description example]
MOV A, [HL+10H]; When setting byte to 10H
Instruction code 0 0 1 0 1 1 0 1
00010000
[Illustration]
16
87
HL
H
0
L
The contents of the memory
addressed are transferred.
7
A
+10
7
Memory
0
0
50
User’s Manual U17446EJ5V0UD