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UPD78F9234MC-5A4-A Datasheet, PDF (43/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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<R>
CHAPTER 3 CPU ARCHITECTURE
Table 3-3. Special Function Registers (4/4)
Address Symbol
Bit No.
R/W
7
6
5
4
3
2
1
0
FFD0H MRA0
â
â
â
â
â
â
â
â
W
FFD1H MRB0
â
â
â
â
â
â
â
â
FFD2H MULC0
0
0
0
0
0
0
0 <MULS R/W
T0>
FFD3H to â
â
â
â
â
â
â
â
â
â
FFDFH
FFE0H IF0
<ADIF> <TMIF <TMIF <TMIF <PIF1> <PIF0> <LVIIF> 0
R/W
010> 000> H1>
FFE1H IF1
0 <STIF <SRIF <SRE <TMIF <PIF3> <PIF2> 0
6>
6>
IF6> 80>
FFE2H,
â
â
â
â
â
â
â
â
â
â
FFE3H
FFE4H MK0
<ADM <TMM <TMM <TMM <PMK <PMK <LVI
1
R/W
K> K010> K000> KH1> 1>
0>
MK>
FFE5H MK1
1 <STMK <SRM <SRE <TMM <PMK <PMK 1
6>
K6> MK6> K80> 3>
2>
FFE6H to â
â
â
â
â
â
â
â
â
â
FFEBH
FFECH INTM0 ES21 ES20 ES11 ES10 ES01 ES00
0
0
R/W
FFEDH INTM1
0
0
0
0
0
0
ES31 ES30
FFEEH
â
â
â
â
â
â
â
â
â
â
to FFF2H
FFF3H PPCC
0
0
0
0
0
0 PPCC1 PPCC0 R/W
FFF4H OSTS
0
0
0
0
0
0 OSTS1 OSTS0
Number of Bits
Manipulated
Simultaneously
1
8
16
â
â
â
â
â
â
â
â
â
After
Reset
Undefined 220
220
00H
222
â
â
â
â
â
â
â
â 00H
229
â
â
â 00H
229
â
â
â
â
â
â
â
â FFH
230
â
â
â FFH
230
â
â
â
â
â
â
â
â 00H
231
â
â
â 00H
232
â
â
â
â
â
â
â
â 02H
75
â
â
â Undefined 77, 240
Note
FFF5H to â
â
â
â
â
â
â
â
â
â
â
â
â
â
â
FFFAH
FFFBH PCC
0
0
0
0
0
0
PCC1
0
R/W â
â
â 02H
75
FFFCH
â
â
â
â
â
â
â
â
â
â
â
â
â
â
â
to FFFFH
Note The oscillation stabilization time that elapses after release of reset is selected by the option byte. For details,
refer to CHAPTER 18 OPTION BYTE.
Remark For a bit name enclosed in angle brackets (<>), the bit name is defined as a reserved word in the RA78K0S,
and is defined as an sfr variable using the #pragma sfr directive in the CC78K0S.
Userâs Manual U17446EJ5V0UD
41
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