UPD78F9234MC-5A4-A Datasheet, PDF (319/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 19 FLASH MEMORY
INCW
BR
DE
; Address at which data is to be written + 1
FlashWriteLoop
FlashVerify:
MOVW
HL,#WriteAdr
; Sets verify address
MOV
FLCMD,#02H
MOV
A,H
MOV
FLAPH,A
MOV
A,L
MOV
FLAPL,A
MOV
A,D
MOV
FLAPHC,A
MOV
A,E
MOV
FLAPLC,A
; Sets flash control command (internal verify 2)
; Sets verify start address
; Sets verify start address
; Sets verify end address
; Sets verify end address
MOV
HALT
MOV
CMP
BNZ
WDTE,#0ACH
A,PFS
A,#00H
$StatusError
; Clears & restarts WDT
; Self programming is started
; Checks internal verify error
; Performs abnormal termination processing when an error
; occurs
MOV
ModeOffLoop:
MOV
MOV
MOV
MOV
MOV
FLCMD,#00H
PFS,#00H
PFCMD,#0A5H
FLPMC,#00H
FLPMC,#0FFH
FLPMC,#00H
; Clears FLCMD register
; Clears flash status register
; PFCMD register control
; FLPMC register control (sets value)
; FLPMC register control (inverts set value)
; Sets normal mode via FLPMC register control (sets value)
BT
PFS.0,$ModeOffLoop ; Checks completion of write to specific registers
; Repeats the same processing when an error occurs
; Restore the CPU clock to its setting before the self
; programming, after normal completion of the specific
; sequence
MOV
MK0,#INT_MK0
; Restores interrupt mask flag
MOV
MK1,#INT_MK1
EI
BR
StatusNormal
;---------------------------------------------------------------------
;END (abnormal termination processing); Perform processing to shift to
normal mode in order to return to normal processing
User’s Manual U17446EJ5V0UD
317