UPD78F9234MC-5A4-A Datasheet, PDF (191/419 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 11 SERIAL INTERFACE UART6
11.3 Registers Controlling Serial Interface UART6
Serial interface UART6 is controlled by the following nine registers.
• Asynchronous serial interface operation mode register 6 (ASIM6)
• Asynchronous serial interface reception error status register 6 (ASIS6)
• Asynchronous serial interface transmission status register 6 (ASIF6)
• Clock selection register 6 (CKSR6)
• Baud rate generator control register 6 (BRGC6)
• Asynchronous serial interface control register 6 (ASICL6)
• Input switch control register (ISC)
• Port mode register 4 (PM4)
• Port register 4 (P4)
(1) Asynchronous serial interface operation mode register 6 (ASIM6)
This 8-bit register controls the serial communication operations of serial interface UART6.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Generation of reset signal sets this register to 01H.
Remark ASIM6 can be refreshed (the same value is written) by software during a communication operation
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6
= 1).
Figure 11-5. Format of Asynchronous Serial Interface Operation Mode Register 6 (ASIM6) (1/2)
Address: FF90H After reset: 01H R/W
Symbol
<7>
<6>
<5>
4
3
2
ASIM6
POWER6
TXE6
RXE6
PS61
PS60
CL6
1
0
SL6
ISRM6
POWER6
0^{Note 1}
1^{Note 3}
Enabling/disabling operation of internal operation clock
Disable operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit^{Note 2}.
Enable operation of the internal operation clock
Notes 1.
2.
3.
The output of the TXD6 pin goes high and the input from the RXD6 pin is fixed to the high level when
POWER6 is cleared to 0 during a transmission 0.
Asynchronous serial interface reception error status register 6 (ASIS6), asynchronous serial interface
transmission status register 6 (ASIF6), bit 7 (SBRF6) and bit 6 (SBRT6) of asynchronous serial
interface control register 6 (ASICL6), and receive buffer register 6 (RXB6) are reset.
A base clock (fXCLK6) is supplied as the internal operation clock when the POWER6 bit is set to 1 and
one clock of the base clock (fXCLK6) has elapsed.
User’s Manual U17446EJ5V0UD
189