PIC18F87K22 Datasheet, PDF (97/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
TABLE 6-2: PIC18F87K22 FAMILY REGISTER FILE SUMMARY (CONTINUED)
Address File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
FE6h POSTINC1 Uses contents of FSR1 to address data memory – value of FSR1 post-incremented (not a physical register)
FE5h POSTDEC1 Uses contents of FSR1 to address data memory – value of FSR1 post-decremented (not a physical register)
FE4h PREINC1
Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register)
FE3h PLUSW1
Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register) – value
of FSR1 offset by W
FE2h FSR1H
—
—
—
—
Indirect Data Memory Address Pointer 1 High
FE1h FSR1L
Indirect Data Memory Address Pointer 1 Low Byte
FE0h BSR
—
—
—
—
Bank Select Register
FDFh INDF2
Uses contents of FSR2 to address data memory – value of FSR2 not changed (not a physical register)
FDEh POSTINC2 Uses contents of FSR2 to address data memory – value of FSR2 post-incremented (not a physical register)
FDDh POSTDEC2 Uses contents of FSR2 to address data memory – value of FSR2 post-decremented (not a physical register)
FDCh PREINC2
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register)
FDBh PLUSW2
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) – value
of FSR2 offset by W
FDAh FSR2H
—
—
—
—
Indirect Data Memory Address Pointer 2 High
FD9h FSR2L
Indirect Data Memory Address Pointer 2 Low Byte
FD8h STATUS
—
—
—
N
OV
Z
DC
C
FD7h TMR0H
Timer0 Register High Byte
FD6h TMR0L
Timer0 Register Low Byte
FD5h T0CON
TMR0ON
T08BIT
T0CS
T0SE
PSA
TOPS2
TOPS1
TOPS0
FD4h SPBRGH1 USART1 Baud Rate Generator High Byte
FD3h
FD2h
OSCCON
IPR5
IDLEN
IRCF2
IRCF1
TMR7GIP⁽³⁾ TMR12IP⁽³⁾ TMR10IP⁽³⁾
IRCF0
TMR8IP
OSTS
TMR7IP⁽³⁾
HFIOFS
TMR6IP
SCS1
TMR5IP
SCS0
TMR4IP
FD1h WDTCON
REGSLP
—
ULPLVL SRETEN
—
ULPEN
ULPSINK SWDTEN
FD0h RCON
IPEN
SBOREN
CM
RI
TO
PD
POR
BOR
FCFh TMR1H
Timer1 Register High Byte
FCEh TMR1L
Timer1 Register Low Byte
FCDh T1CON
TMR1CS1 TMR1CS0 T1CKPS1 T1CKPS0 SOSCEN T1SYNC
RD16
TMR1ON
FCCh TMR2
Timer2 Register
FCBh PR2
Timer2 Period Register
FCAh T2CON
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
FC9h
FC8h
SSP1BUF
SSP1ADD
MSSP Receive Buffer/Transmit Register
MSSP Address Register in I²C™ Slave Mode. SSP1 Baud Rate Reload Register in I²C Master Mode.
FC7h SSP1STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
FC6h SSP1CON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
FC5h SSP1CON2
GCEN
ACKSTAT ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
FC4h ADRESH
A/D Result Register High Byte
FC3h ADRESL
A/D Result Register Low Byte
FC2h ADCON0
—
CHS4
CHS3
CHS2
CHS1
CHS0
GO/DONE
ADON
FC1h ADCON1
TRIGSEL1 TRIGSEL0 VCFG1
VCFG0
VNCFG
CHSN2
CHSN1
CHSN0
FC0h ADCON2
ADFM
—
ACQT2
ACQT1
ACQT0
ADCS2
ADCS1
ADCS0
FBFh ECCP1AS
ECCP1ASE ECCP1AS2 ECCP1AS1 ECCP1AS0 PSS1AC1 PSS1AC0 PSS1BD1 PSS1BD0
FBEh ECCP1DEL
P1RSEN
P1DC6
P1DC5
P1DC4
P1DC3
P1DC2
P1DC1
P1DC0
FBDh CCPR1H
Capture/Compare/PWM Register1 High Byte
FBCh CCPR1L
Capture/Compare/PWM Register1 Low Byte
FBBh
FBAh
FB9h
FB8h
FB7h
CCP1CON
PIR5
PIE5
IPR4
PIR4
P1M1
TMR7GIF⁽³⁾
TMR7GIE⁽³⁾
CCP10IP⁽³⁾
CCP10IF⁽³⁾
P1M0
TMR12IF⁽³⁾
TMR12IE⁽³⁾
CCP9IP⁽³⁾
CCP9IF⁽³⁾
DC1B1
TMR10IF⁽³⁾
TMR10IE
CCP8IP
CCP8IF
DC1B0
TMR8IF
TMR8IE
CCP7IP
CCP7IF
CCP1M3
TMR7IF⁽³⁾
TMR7IE⁽³⁾
CCP6IP
CCP6IF
CCP1M2
TMR6IF
TMR6IE
CCP5IP
CCP5IF
CCP1M1
TMR5IF
TMR5IE
CCP4IP
CCP4IF
CCP1M0
TMR4IF
TMR4IE
CCP3IP
CCP3IF
Note 1:
2:
3:
The bit is available when Master Clear is disabled (MCLRE = 0). When MCLRE is set, the bit is unimplemented.
Unimplemented on 64-pin devices (PIC18F6XK22).
Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).
---- ----
---- ----
---- ----
---- ----
---- xxxx
xxxx xxxx
---- 0000
---- ----
---- ----
---- ----
---- ----
---- ----
---- xxxx
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0000 0000
0110 q000
1000 0000
0-x0 -000
0111 11qq
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
-000 0000
0000 0000
0-00 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1000 0000
1111 1111
0000 0000
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 97