PIC18F87K22 Datasheet, PDF (406/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
REGISTER 28-4: CONFIG2H: CONFIGURATION REGISTER 2 HIGH (BYTE ADDRESS 300003h)
U-0
—
bit 7
R/P-1
WDTPS4
R/P-1
WDTPS3
R/P-1
WDTPS2
R/P-1
WDTPS1
R/P-1
WDTPS0
R/P-1
WDTEN1
R/P-1
WDTEN0
bit 0
Legend:
R = Readable bit
-n = Value at POR
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6-2
bit 1-0
Unimplemented: Read as ‘0’
WDTPS<4:0>: Watchdog Timer Postscale Select bits
10101-11111 = Reserved
10100 = 1:1,048,576 (4,194.304s)
10011 = 1:524,288 (2,097.152s)
10010 = 1:262,144 (1,048.576s)
10001 = 1:131,072 (524.288s)
10000 = 1:65,536 (262.144s)
01111 = 1:32,768 (131.072s)
01110 = 1:16,384 (65.536s)
01101 = 1:8,192 (32.768s)
01100 = 1:4,096 (16.384s)
01011 = 1:2,048 (8.192s)
01010 = 1:1,024 (4.096s)
01001 = 1:512 (2.048s)
01000 = 1:256 (1.024s)
00111 = 1:128 (512 ms)
00110 = 1:64 (256 ms)
00101 = 1:32 (128 ms)
00100 = 1:16 (64 ms)
00011 = 1:8 (32 ms)
00010 = 1:4 (16 ms)
00001 = 1:2 (8 ms)
00000 = 1:1 (4 ms)
WDTEN<1:0>: Watchdog Timer Enable bits
11 = WDT is enabled in hardware; SWDTEN bit is disabled
10 = WDT is controlled by the SWDTEN bit setting
01 = WDT is enabled only while the device is active and disabled in Sleep mode; SWDTEN bit is
disabled
00 = WDT is disabled in hardware; SWDTEN bit is disabled
DS39960B-page 406
Preliminary
 2010 Microchip Technology Inc.