PIC18F87K22 Datasheet, PDF (115/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
7.5 Writing to Flash Program Memory
The programming blocks are:
• PIC18FX5K22 and PIC18FX6K22 – 32 words or
64 bytes
• PIC18FX7K22 – 64 words or 128 bytes
Word or byte programming is not supported.
Table writes are used internally to load the holding
registers needed to program the Flash memory. The
number of holding registers used for programming by
the table writes are:
• PIC18FX5K22 and PIC18FX6K22 – 64
• PIC18FX7K22 – 128
Since the Table Latch (TABLAT) is only a single byte, the
TBLWT instruction may need to be executed 64 times for
each programming operation. All of the table write oper-
ations will essentially be short writes because only the
holding registers are written. At the end of updating the
64 or 128 holding registers, the EECON1 register must
be written to in order to start the programming operation
with a long write.
The long write is necessary for programming the
internal Flash. Instruction execution is halted while in a
long write cycle. The long write is terminated by the
internal programming timer.
The EEPROM on-chip timer controls the write time.
The write/erase voltages are generated by an on-chip
charge pump, rated to operate over the voltage range
of the device.
Note:
The default value of the holding registers on
device Resets and after write operations is
FFh. A write of FFh to a holding register
does not modify that byte. This means that
individual bytes of program memory may be
modified, provided that the change does not
attempt to change any bit from a ‘0’ to a ‘1’.
When modifying individual bytes, it is not
necessary to load all 64 or 128 holding
registers before executing a write operation.
FIGURE 7-5:
TABLE WRITES TO FLASH PROGRAM MEMORY
TABLAT
Write Register
8
8
8
TBLPTR = xxxxx0
TBLPTR = xxxxx1
TBLPTR = xxxxx2
Holding Register
Holding Register
Holding Register
8
TBLPTR = xxxx3F
Holding Register
Program Memory
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 115