PIC18F87K22 Datasheet, PDF (65/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
REGISTER 4-3: PMD1: PERIPHERAL MODULE DISABLE REGISTER 1
R/W-0
PSPMD
bit 7
R/W-0
R/W-0
R/W-0
CTMUMD RTCCMD^(1,2) TMR4MD
R/W-0
TMR3MD
R/W-0
TMR2MD
R/W-0
TMR1MD
R/W-0
EMBMD⁽³⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
PSPMD: Peripheral Module Disable (PMD) PSP Enable/Disable bit
1 = PMD is enabled for PSP
0 = PMD is disabled for PSP
bit 6
CTMUMD: PMD CTMU Enable/Disable bit
1 = PMD is enabled for CTMU, disabling all of its clock sources
0 = PMD is disabled for CTMU
bit 5
RTCCMD: PMD RTCC Enable/Disable bit^(1,2)
1 = PMD is enabled for RTCC, disabling all of its clock sources
0 = PMD is disabled for RTCC
bit 4
TMR4MD: TMR4MD Disable bit
1 = PMD is enabled and all TMR4MD clock sources disabled
0 = PMD is disabled and TMR4MD
bit 3
TMR3MD: TMR3MD Disable bit
1 = PMD is enabled and all TMR3MD clock sources disabled
0 = PMD is disabled and TMR3MD
bit 2
TMR2MD: TMR2MD Disable bit
1 = PMD is enabled and all TMR2MD clock sources disabled
0 = PMD is disabled and TMR2MD
bit 1
TMR1MD: TMR1MD Disable bit
1 = PMD is enabled and all TMR1MD clock sources disabled
0 = PMD is disabled and TMR1MD
bit 0
EMBMD: PMD EMB Enable/Disable bit⁽³⁾
1 = PMD is enabled for EMB
0 = PMD is disabled for EMB
Note 1:
2:
3:
Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).
RTCCMD can only be set to ‘1’ after an EECON2 unlock sequence. Refer to Section 18.0 “Real-Time
Clock and Calendar (RTCC)” for the unlock sequence (Example 18-1).
Unimplemented on devices with 64 pins (PIC18F6XK22).
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 65