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PIC18F87K22 Datasheet, PDF (253/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology
PIC18F87K22 FAMILY
19.4 PWM Mode
In Pulse-Width Modulation (PWM) mode, the CCP4 pin
produces up to a 10-bit resolution PWM output. Since
the CCP4 pin is multiplexed with a PORTC or PORTE
data latch, the appropriate TRIS bit must be cleared to
make the CCP4 pin an output.
Note:
Clearing the CCP4CON register will force
the RC1 or RE7 output latch (depending
on device configuration) to the default low
level. This is not the PORTC or PORTE
I/O data latch.
Figure 19-3 shows a simplified block diagram of the
ECCP1 module in PWM mode.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see Section 19.4.3
“Setup for PWM Operation”.
FIGURE 19-3:
SIMPLIFIED PWM BLOCK
DIAGRAM
Duty Cycle Registers
CCP4CON<5:4>
CCPR4L
CCPR4H (Slave)
Comparator
TMR2
(Note 1)
R
Q
S
RC2/ECCP1
Comparator
PR2
Clear Timer,
ECCP1 Pin and
Latch D.C.
TRISC<2>
Note 1:
2:
The 8-bit TMR2 value is concatenated with the 2-bit
internal Q clock, or 2 bits of the prescaler, to create
the 10-bit time base.
CCP4 and its appropriate timers are used as an
example. For details on all of the CCP modules and
their timer assignments, see Table 19-2 and
Table 19-3.
A PWM output (Figure 19-4) has a time base (period)
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period
(1/period).
FIGURE 19-4:
PWM OUTPUT
Period
Duty Cycle
TMR2 = PR2
TMR2 = Duty Cycle
TMR2 = PR2
19.4.1 PWM PERIOD
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following formula:
EQUATION 19-1:
PWM Period = [(PR2) + 1] • 4 • TOSC •
(TMR2 Prescale Value)
PWM frequency is defined as 1/[PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP4 pin is set
(An exception: If PWM duty cycle = 0%, the CCP4
pin will not be set)
• The PWM duty cycle is latched from CCPR4L into
CCPR4H
Note:
The Timer2 postscalers (see Section 15.0
“Timer2 Module”) are not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 253