PIC18F87K22 Datasheet, PDF (153/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
REGISTER 11-14: PIE5: PERIPHERAL INTERRUPT ENABLE REGISTER 5
R/W-0
TMR7GIE⁽¹⁾
bit 7
R/W-0
TMR12IE⁽¹⁾
R/W-0
TMR10IE⁽¹⁾
R/W-0
TMR8IE
R/W-0
TMR7IE⁽¹⁾
R/W-0
TMR6IE
R/W-0
TMR5IE
R/W-0
TMR4IE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR7GIE: TMR7 Gate Interrupt Enable bit⁽¹⁾
1 = Enabled
0 = Disabled
bit 6
TMR12IE: TMR12 to PR12 Match Interrupt Enable bit⁽¹⁾
1 = Enables the TMR12 to PR12 match interrupt
0 = Disables the TMR12 to PR12 match interrupt
bit 5
TMR10IE: TMR10 to PR10 Match Interrupt Enable bit⁽¹⁾
1 = Enables the TMR10 to PR10 match interrupt
0 = Disables the TMR10 to PR10 match interrupt
bit 4
TMR8IE: TMR8 to PR8 Match Interrupt Enable bit
1 = Enables the TMR8 to PR8 match interrupt
0 = Disables the TMR8 to PR8 match interrupt
bit 3
TMR7IE: TMR7 Overflow Interrupt Enable bit⁽¹⁾
1 = Enables the TMR7 overflow interrupt
0 = Disables the TMR7 overflow interrupt
bit 2
TMR6IE: TMR6 to PR6 Match Interrupt Enable bit
1 = Enables the TMR6 to PR6 match interrupt
0 = Disables the TMR6 to PR6 match interrupt
bit 1
TMR5IE: TMR5 Overflow Interrupt Enable bit
1 = Enables the TMR5 overflow interrupt
0 = Disables the TMR5 overflow interrupt
bit 0
TMR4IE: TMR4 to PR4 Match Interrupt Enable bit
1 = Enables the TMR4 to PR4 match interrupt
0 = Disables the TMR4 to PR4 match interrupt
Note 1: Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 153