PIC18F87K22 Datasheet, PDF (25/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
TABLE 1-4: PIC18F8XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
TQFP ^{Type Type}
Description
PORTA is a bidirectional I/O port.
RA0/AN0/ULPWU
RA0
AN0
ULPWU
30
I/O TTL
Digital I/O.
I Analog Analog Input 0.
I Analog Ultra low-power wake-up input.
RA1/AN1
RA1
AN1
29
I/O TTL
Digital I/O.
I Analog Analog Input 1.
RA2/AN2/VREF-
RA2
AN2
VREF-
28
I/O TTL
Digital I/O.
I Analog Analog Input 2.
I Analog A/D reference voltage (low) input.
RA3/AN3/VREF+
RA3
AN3
VREF+
27
I/O TTL
Digital I/O.
I Analog Analog Input 3.
I Analog A/D reference voltage (high) input.
RA4/T0CKI
RA4
T0CKI
34
I/O ST
Digital I/O.
I
ST
Timer0 external clock input.
RA5/AN4/T1CKI/
T3G/HLVDIN
RA5
AN4
T1CKI
T3G
HLVDIN
33
I/O TTL
I Analog
I
ST
I
ST
I Analog
Digital I/O.
Analog Input 4.
Timer1 clock input.
Timer3 external clock gate input.
High/Low-Voltage Detect input.
RA6
See the OSC2/CLKO/RA6 pin.
RA7
Legend:
Note 1:
2:
3:
4:
5:
See the OSC1/CLKI/RA7 pin.
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
I²C = I²C™/SMBus
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
PSP is available only in Microcontroller mode.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 25