PIC18F87K22 Datasheet, PDF (138/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
Example 10-3 shows the sequence to do a 16 x 16
unsigned multiplication. Equation 10-1 shows the
algorithm that is used. The 32-bit result is stored in four
registers (RES3:RES0).
EQUATION 10-1: 16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
RES3:RES0 = ARG1H:ARG1L  ARG2H:ARG2L
= (ARG1H  ARG2H  2¹⁶) +
(ARG1H  ARG2L  2⁸) +
(ARG1L  ARG2H  2⁸) +
(ARG1L  ARG2L)
EXAMPLE 10-3: 16 x 16 UNSIGNED
MULTIPLY ROUTINE
MOVF ARG1L, W
MULWF ARG2L
MOVFF PRODH, RES1
MOVFF PRODL, RES0
;
MOVF ARG1H, W
MULWF ARG2H
MOVFF PRODH, RES3
MOVFF PRODL, RES2
;
MOVF ARG1L, W
MULWF ARG2H
MOVF PRODL, W
ADDWF RES1, F
MOVF PRODH, W
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
;
MOVF ARG1H, W
MULWF ARG2L
MOVF
ADDWF
MOVF
ADDWFC
CLRF
ADDWFC
PRODL, W
RES1, F
PRODH, W
RES2, F
WREG
RES3, F
; ARG1L * ARG2L->
; PRODH:PRODL
;
;
; ARG1H * ARG2H->
; PRODH:PRODL
;
;
; ARG1L * ARG2H->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
Example 10-4 shows the sequence to do a 16 x 16
signed multiply. Equation 10-2 shows the algorithm
used. The 32-bit result is stored in four registers
(RES3:RES0). To account for the sign bits of the
arguments, the MSb for each argument pair is tested
and the appropriate subtractions are done.
EQUATION 10-2: 16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
RES3:RES0=
=
ARG1H:ARG1L  ARG2H:ARG2L
(ARG1H  ARG2H  2¹⁶) +
(ARG1H  ARG2L  2⁸) +
(ARG1L  ARG2H  2⁸) +
(ARG1L  ARG2L) +
(-1  ARG2H<7>  ARG1H:ARG1L  2¹⁶) +
(-1  ARG1H<7>  ARG2H:ARG2L  2¹⁶)
EXAMPLE 10-4: 16 x 16 SIGNED MULTIPLY
ROUTINE
MOVF ARG1L, W
MULWF ARG2L
; ARG1L * ARG2L ->
; PRODH:PRODL
MOVFF PRODH, RES1 ;
MOVFF PRODL, RES0 ;
;
MOVF ARG1H, W
MULWF ARG2H
; ARG1H * ARG2H ->
; PRODH:PRODL
MOVFF PRODH, RES3 ;
MOVFF PRODL, RES2 ;
;
MOVF ARG1L, W
MULWF ARG2H
; ARG1L * ARG2H ->
; PRODH:PRODL
MOVF PRODL, W ;
ADDWF RES1, F
; Add cross
MOVF PRODH, W ; products
ADDWFC RES2, F
;
CLRF WREG
;
ADDWFC RES3, F
;
;
MOVF ARG1H, W ;
MULWF ARG2L
; ARG1H * ARG2L ->
; PRODH:PRODL
MOVF PRODL, W ;
ADDWF RES1, F
; Add cross
MOVF PRODH, W ; products
ADDWFC RES2, F
;
CLRF WREG
;
ADDWFC RES3, F
;
;
BTFSS ARG2H, 7 ; ARG2H:ARG2L neg?
BRA SIGN_ARG1
; no, check ARG1
MOVF ARG1L, W ;
SUBWF RES2
;
MOVF ARG1H, W ;
SUBWFB RES3
;
SIGN_ARG1
BTFSS ARG1H, 7 ; ARG1H:ARG1L neg?
BRA
CONT_CODE ; no, done
MOVF ARG2L, W ;
SUBWF RES2
;
MOVF ARG2H, W ;
SUBWFB RES3
;
CONT_CODE
:
DS39960B-page 138
Preliminary
 2010 Microchip Technology Inc.