PIC18F87K22 Datasheet, PDF (356/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
REGISTER 23-10: ANCON2: A/D PORT CONFIGURATION REGISTER 2
R/W-1
ANSEL23⁽¹⁾
bit 7
R/W-1
ANSEL22⁽¹⁾
R/W-1
ANSEL21⁽¹⁾
R/W-1
ANSEL20⁽¹⁾
R/W-1
ANSEL19
R/W-1
ANSEL18
R/W-1
ANSEL17
R/W-1
ANSEL16
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
ANSEL<23:16>: Analog Port Configuration bits (AN23 through AN16)
1 = Pin configured as an analog channel; digital input is disabled and any inputs read as ‘0’
0 = Pin configured as a digital port
Note 1: AN15 through AN12 and AN 20 through AN23 are implemented only on 80-pin devices. For 64-pin
devices, the corresponding ANSELx bits are still implemented for these channels, but have no effect.
The analog reference voltage is software-selectable to
either the device’s positive and negative supply voltage
(AVDD and AVSS) or the voltage level on the
RA3/AN3/VREF+ and RA2/AN2/VREF- pins. VREF+ has
two additional internal voltage reference selections:
2.048V and 4.096V.
The A/D Converter can uniquely operate while the
device is in Sleep mode. To operate in Sleep, the A/D
conversion clock must be derived from the A/D’s
internal RC oscillator.
The output of the sample and hold is the input into the
converter, which generates the result via successive
approximation.
Each port pin associated with the A/D Converter can be
configured as an analog input or a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH:ADRESL
register pair, the GO/DONE bit (ADCON0<1>) is
cleared and the A/D Interrupt Flag bit, ADIF (PIR1<6>),
is set.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted. The value in the
ADRESH:ADRESL register pair is not modified for a
Power-on Reset. These registers will contain unknown
data after a Power-on Reset.
The block diagram of the A/D module is shown in
Figure 23-4.
DS39960B-page 356
Preliminary
 2010 Microchip Technology Inc.