PIC18F87K22 Datasheet, PDF (22/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
TABLE 1-3: PIC18F6XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
QFN/TQFP ^{Type Type}
Description
PORTG is a bidirectional I/O port.
RG0/ECCP3/P3A
RG0
ECCP3
P3A
3
I/O ST
Digital I/O.
I/O ST
Capture 3 input/Compare 3 output/PWM3 output.
O
—
ECCP3 PWM Output A.
RG1/TX2/CK2/AN19/
C3OUT
RG1
TX2
CK2
AN19
C3OUT
4
I/O ST
O
—
I/O ST
I Analog
O
—
Digital I/O.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX2/DT2).
Analog Input 19.
Comparator 3 output.
RG2/RX2/DT2/AN18/
C3INA
RG2
RX2
DT2
AN18
C3INA
5
I/O ST
I
ST
I/O ST
I Analog
I Analog
Digital I/O.
EUSART asynchronous receive.
EUSART synchronous data (see related TX2/CK2).
Analog Input 18.
Comparator 3 Input A.
RG3/CCP4/AN17/P3D/
C3INB
RG3
CCP4
AN17
P3D
C3INB
6
I/O ST
I/O S/T
I Analog
O
—
I Analog
Digital I/O.
Capture 4 input/Compare 4 output/PWM4 output.
Analog Input 18.
ECCP3 PWM Output D.
Comparator 3 Input B.
RG4/RTCC/T7CKI/T5G/
8
CCP5/AN16/P1D/C3INC
RG4
I/O ST
Digital I/O.
RTCC
T7CKI⁽³⁾
O
—
I
ST
RTCC output
Timer7 clock input.
T5G
I
ST
Timer5 external clock gate input.
CCP5
I/O ST
Capture 5 input/Compare 5 output/PWM5 output.
AN16
I Analog Analog Input 16.
P1D
O
—
ECCP1 PWM Output D.
C3INC
I Analog Comparator 3 Input C.
RG5
Legend:
7
See the MCLR/RG5 pin.
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
I²C = I²C™/SMBus
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Note 1:
2:
3:
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
DS39960B-page 22
Preliminary
 2010 Microchip Technology Inc.