PIC18F87K22 Datasheet, PDF (84/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Wake-up via WDT
or Interrupt
ODCON2
PIC18F66K22 PIC18F86K22
PIC18F67K22 PIC18F87K22
0000 0000
uuuu uuuu
uuuu uuuu
ODCON2
PIC18F65K22 PIC18F85K22
--00 0000
--uu uuuu
--uu uuuu
ODCON3
PIC18F6XK22 PIC18F8XK22
00-- ---0
uu-- ---u
uu-- ---u
MEMCON
PIC18F6XK22 PIC18F8XK22
0-00 --00
0-00 --00
u-uu --uu
ANCON0
PIC18F6XK22 PIC18F8XK22
1111 1111
uuuu uuuu
uuuu uuuu
ANCON1
PIC18F6XK22 PIC18F8XK22
1111 1111
uuuu uuuu
uuuu uuuu
ANCON2
PIC18F6XK22 PIC18F8XK22
1111 1111
uuuu uuuu
uuuu uuuu
RCSTA2
PIC18F6XK22 PIC18F8XK22
0000 000x
0000 000x
uuuu uuuu
TXSTA2
PIC18F6XK22 PIC18F8XK22
0000 0010
0000 0010
uuuu uuuu
BAUDCON2 PIC18F6XK22 PIC18F8XK22
0100 0-00
0100 0-00
uuuu u-uu
SPBRGH2
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
SPBRG2
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
RCREG2
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
TXREG2
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
PSTR2CON PIC18F6XK22 PIC18F8XK22
00-0 0001
00-0 0001
uu-u uuuu
PSTR3CON PIC18F6XK22 PIC18F8XK22
00-0 0001
00-0 0001
uu-u uuuu
PMD0
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
PMD1
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
PMD2
PIC18F66K22 PIC18F86K22
PIC18F67K22 PIC18F87K22
0000 0000
0000 0000
uuuu uuuu
PMD2
PIC18F65K22 PIC18F85K22
-0-0 0000
-0-0 0000
-u-u uuuu
PMD3
PIC18F66K22 PIC18F86K22
PIC18F67K22 PIC18F87K22
0000 0000
0000 0000
uuuu uuuu
PMD3
PIC18F65K22 PIC18F85K22
--00 000-
--00 000-
--uu uuu-
Legend:
Note 1:
2:
3:
4:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
See Table 5-1 for Reset value for specific condition.
DS39960B-page 84
Preliminary
 2010 Microchip Technology Inc.