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PIC18F87K22 Datasheet, PDF (504/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology | |||
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PIC18F87K22 FAMILY
FIGURE 31-6:
OSC1
A<19:8>
AD<7:0>
BA0
ALE
CE
OE
PROGRAM MEMORY FETCH TIMING DIAGRAM (8-BIT)
Q1
Q2
Q3
Q4
Q1
Address
167
166
150
151
161
Address
Data
Data
153
155
162A
154
162
163
170
170A
168
Q2
Address
Address
Note: Fmax = 25 MHz in 8-Bit External Memory mode.
TABLE 31-7: PROGRAM MEMORY FETCH TIMING REQUIREMENTS (8-BIT)
Param
No
Symbol
Characteristics
Min
Typ
Max
Units
150 TadV2aIL Address Out Valid to ALE ï¯ (address setup time) 0.25 TCY â 10 â
â
ns
151 TaIL2adl ALE ï¯ to Address Out Invalid (address hold time)
5
â
â
ns
153 BA01
BA0 ï to Most Significant Data Valid
0.125 TCY
â
â
ns
154 BA02
BA0 ï¯ to Least Significant Data Valid
0.125 TCY
â
â
ns
155 TaIL2oeL ALE ï¯ to OE ï¯
0.125 TCY
â
â
ns
161 ToeH2adD OE ï to A/D Driven
0.125 TCY â 5 â
â
ns
162 TadV2oeH Least Significant Data Valid Before OE ï
(data setup time
20
â
â
ns
162A TadV2oeH Most Significant Data Valid Before OE ï
(data setup time)
0.25 TCY + 20 â
â
ns
163 ToeH2adI OE ï to Data in Invalid (data Hold Time)
0
â
â
ns
166 TaIH2aIH ALE ï to ALE ï (cycle time)
â
TCY
â
ns
167 TACC
Address Valid to Data Valid
0.5 TCY â 10 â
â
ns
168 Toe
OE ï¯ to Data Valid
â
â 0.125 TCY + 5 ns
170 TubH2oeH BA0 = 0 Valid Before OE ï
0.25 TCY
â
â
ns
170A TubL2oeH BA0 = 1 Valid Before OE ï
0.5 TCY
â
â
ns
DS39960B-page 504
Preliminary
ï£ 2010 Microchip Technology Inc.
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