PIC18F87K22 Datasheet, PDF (183/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
12.9 PORTH, LATH and
TRISH Registers
Note: PORTH is available only on the 80-pin
devices.
PORTH is an 8-bit wide, bidirectional I/O port. The
corresponding Data Direction and Output Latch registers
are TRISH and LATH.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
EXAMPLE 12-8: INITIALIZING PORTH
CLRF PORTH
CLRF LATH
BANKSEL ANCON2
MOVLW 0Fh
MOVWF ANCON2
MOVLW 0Fh
MOVWF ANCON1
BANKSEL TRISH
MOVLW 0CFh
MOVWF TRISH
; Initialize PORTH by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Select bank with ANCON2 register
; Configure PORTH as
; digital I/O
; Configure PORTH as
; digital I/O
; Select bank with TRISH register
; Value used to
; initialize data
; direction
; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs
TABLE 12-15: PORTH FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RH0/AN23
RH0
0
O
DIG LATH<0> data output.
1
I
ST PORTH<0> data input.
AN23
1
I
ANA A/D Input Channel 23.
Default input configuration on POR. Does not affect digital input.
RH1/AN22
RH1
0
O
DIG LATH<1> data output.
1
I
ST PORTH<1> data input.
AN22
1
I
ANA A/D Input Channel 22.
Default input configuration on POR. Does not affect digital input.
RH2/AN21
RH2
0
O
DIG LATH<2> data output.
1
I
ST PORTH<2> data input.
AN21
1
I
ANA A/D Input Channel 21.
Default input configuration on POR. Does not affect digital input.
RH3/AN20
RH3
0
O
DIG LATH<3> data output.
1
I
ST PORTH<3> data input.
AN20
1
I
ANA A/D Input Channel 20.
Default input configuration on POR. Does not affect digital input.
RH4/CCP9/
P3C/AN12/
C2INC
RH4
CCP9
0
O
DIG LATH<4> data output.
1
I
ST PORTH<4> data input.
0
O
DIG CCP9 compare/PWM output. Takes priority over port data.
1
I
ST CCP9 capture input.
P3C
0
O
— ECCP3 PWM Output C.
May be configured for tri-state during Enhanced PWM.
AN12
1
I
ANA A/D Input Channel 12.
Default input configuration on POR. Does not affect digital input.
C2INC
x
I
ANA Comparator 2 Input C.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 183