PIC18F87K22 Datasheet, PDF(77/548 Page) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

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PIC18F87K22 Datasheet, PDF (77/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

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PIC18F87K22 FAMILY

TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets,

WDT Reset,

RESET Instruction,

Stack Resets,

CM Resets

Wake-up via WDT

or Interrupt

TOSU

TOSH

TOSL

STKPTR

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---0 0000

0000 0000

0000 0000

00-0 0000

---0 0000

0000 0000

0000 0000

uu-0 0000

---0 uuuu(1)

uuuu uuuu(1)

uuuu uuuu(1)

uu-u uuuu(1)

PCLATU

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---0 0000

---0 0000

---u uuuu

PCLATH

PCL

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0000 0000

0000 0000

0000 0000

0000 0000

uuuu uuuu

PC + 2(2)

TBLPTRU

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--00 0000

--00 0000

--uu uuuu

TBLPTRH

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0000 0000

0000 0000

uuuu uuuu

TBLPTRL

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0000 0000

0000 0000

uuuu uuuu

TABLAT

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0000 0000

0000 0000

uuuu uuuu

PRODH

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xxxx xxxx

uuuu uuuu

uuuu uuuu

PRODL

INTCON

INTCON2

INTCON3

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xxxx xxxx

0000 000x

1111 1111

1100 0000

uuuu uuuu

0000 000u

1111 1111

1100 0000

uuuu uuuu

uuuu uuuu(3)

uuuu uuuu(3)

uuuu uuuu(3)

INDF0

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N/A

N/A

N/A

POSTINC0

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N/A

N/A

N/A

POSTDEC0 PIC18F6XK22 PIC18F8XK22

N/A

N/A

N/A

PREINC0

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N/A

N/A

N/A

PLUSW0

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N/A

N/A

N/A

FSR0H

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---- xxxx

---- uuuu

---- uuuu

FSR0L

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xxxx xxxx

uuuu uuuu

uuuu uuuu

WREG

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xxxx xxxx

uuuu uuuu

uuuu uuuu

INDF1

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N/A

N/A

N/A

POSTINC1

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N/A

N/A

N/A

POSTDEC1 PIC18F6XK22 PIC18F8XK22

N/A

N/A

N/A

PREINC1

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N/A

N/A

N/A

PLUSW1

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N/A

N/A

N/A

FSR1H

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---- xxxx

---- uuuu

---- uuuu

FSR1L

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xxxx xxxx

uuuu uuuu

uuuu uuuu

BSR

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---- 0000

---- 0000

---- uuuu

Legend:

Note 1:

2:

3:

4:

u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware

stack.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector

(0008h or 0018h).

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

See Table 5-1 for Reset value for specific condition.

ï£ 2010 Microchip Technology Inc.

Preliminary

DS39960B-page 77

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