PIC18F87K22 Datasheet, PDF (116/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
7.5.1
FLASH PROGRAM MEMORY WRITE
SEQUENCE
The sequence of events for programming an internal
program memory location should be:
1. Read the 64 or 128 bytes into RAM.
2. Update the data values in RAM as necessary.
3. Load the Table Pointer register with the address
being erased.
4. Execute the row erase procedure.
5. Load the Table Pointer register with the address
of the first byte being written.
6. Write the 64 or 128 bytes into the holding
registers with auto-increment.
7. Set the EECON1 register for the write operation:
• Set the EEPGD bit to point to program memory
• Clear the CFGS bit to access program memory
• Set the WREN to enable byte writes
8. Disable the interrupts.
9. Write 0x55 to EECON2.
10. Write 0xAA to EECON2.
11. Set the WR bit. This will begin the write cycle.
The CPU will stall for duration of the write for TIW
(see parameter D133A).
12. Re-enable the interrupts.
13. Verify the memory (table read).
An example of the required code is shown in
Example 7-3 on the following page.
Note:
Before setting the WR bit, the Table
Pointer address needs to be within the
intended address range of the 64 or
128 bytes in the holding register.
Note:
Self-write execution to Flash and
EEPROM memory cannot be done while
running in LP Oscillator mode (Low-Power
mode). Therefore, executing a self-write
will put the device into High-Power mode.
DS39960B-page 116
Preliminary
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