PIC18F87K22 Datasheet, PDF (220/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
TABLE 16-5: REGISTERS ASSOCIATED WITH TIMER3/5/7 AS A TIMER/COUNTER
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
INTCON
PIR5
IPR5
PIE5
PIE3
IPR3
PIR3
PIE2
PIR2
IPR2
TMR3H
TMR3L
T3GCON
GIE/GIEH PEIE/GIEL TMR0IE
TMR7GIF⁽¹⁾ TMR12IF⁽¹⁾ TMR10IF⁽¹⁾
TMR7GIP TMR12IP TMR10IP
TMR7GIE⁽¹⁾ TMR12IE⁽¹⁾ TMR10IE⁽¹⁾
TMR5GIE
—
RC2IE
TMR5GIP
—
RC2IP
TMR5GIF
—
RC2IF
OSCFIE
—
SSP2IE
OSCFIF
—
SSP2IF
OSCFIP
—
SSP2IP
Timer3 Register High Byte
Timer3 Register Low Byte
TMR3GE T3GPOL T3GTM
INT0IE
TMR8IF
TMR8IP
TMR8IE
TX2IE
TX2IP
TX2IF
BCL2IE
BCL2IF
BCL2IP
T3GSPM
RBIE
TMR7IF⁽¹⁾
TMR7IP
TMR7IE⁽¹⁾
CTMUIE
CTMUIP
CTMUIF
BCL1IE
BCL1IF
BCL1IP
T3GGO/
T3DONE
TMR0IF
TMR6IF
TMR6IP
TMR6IE
CCP2IE
CCP2IP
CCP2IF
HLVDIE
HLVDIF
HLVDIP
T3GVAL
INT0IF
TMR5IF
TMR5IP
TMR5IE
CCP1IE
CCP1IP
CCP1IF
TMR3IE
TMR3IF
TMR3IP
T3GSS1
T3CON
TMR5H
TMR5L
T5GCON
TMR3CS1 TMR3CS0 T3CKPS1
Timer5 Register High Byte
Timer5 Register Low Byte
TMR5GE T5GPOL T5GTM
T3CKPS0
T5GSPM
SOSCEN
T5GGO/
T5DONE
T3SYNC
T5GVAL
RD16
T5GSS1
T5CON
TMR7H
TMR7L
T7GCON
TMR5CS1 TMR5CS0 T5CKPS1
Timer7 Register High Byte
Timer7 Register Low Byte
TMR7GE T7GPOL T7GTM
T5CKPS0
T7GSPM
SOSCEN
T7GGO/
T7DONE
T5SYNC
T7GVAL
RD16
T7GSS1
T7CON
TMR7CS1 TMR7CS0 T7CKPS1 T7CKPS0 SOSCEN T7SYNC RD16
OSCCON2
—
SOSCRUN
—
—
SOSCGO
—
MFIOFS
PMD1
PSPMD CTMUMD RTCCMD TMR4MD TMR3MD TMR2MD TMR1MD
PMD2
TMR10MD TMR8MD TMR7MD TMR6MD TMR5MD CMP3MD CMP2MD
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer3/5/7 module.
Note 1: Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).
Bit 0
RBIF
TMR4IF
TMR4IP
TMR4IE
RTCCIE
RTCCIP
RTCCIF
TMR3GIE
TMR3GIF
TMR3GIP
T3GSS0
TMR3ON
T5GSS0
TMR5ON
T7GSS0
TMR7ON
MFIOSEL
EMBMD
CMP2MD
DS39960B-page 220
Preliminary
 2010 Microchip Technology Inc.