PIC18F87K22 Datasheet, PDF (146/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
REGISTER 11-6: PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3
R/W-0
TMR5GIF
bit 7
R/W-0
—
R-0
RC2IF
R-0
TX2IF
R/W-0
CTMUIF
R/W-0
CCP2IF
R/W-0
CCP1IF
R/W-0
RTCCIF
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR5GIF: Timer5 Gate Interrupt Flag bit
1 = Timer gate interrupt occured (bit must be cleared in software)
0 = No timer gate interrupt occured
bit 6
Unimplemented: Read as ‘0’
bit 5
RC2IF: EUSART Receive Interrupt Flag bit
1 = The EUSART receive buffer, RCREG2, is full (cleared when RCREG2 is read)
0 = The EUSART receive buffer is empty
bit 4
TX2IF: EUSART Transmit Interrupt Flag bit
1 = The EUSART transmit buffer, TXREG2, is empty (cleared when TXREG2 is written)
0 = The EUSART transmit buffer is full
bit 3
CTMUIF: CTMU Interrupt Flag bit
1 = CTMU interrupt occured (must be cleared in software)
0 = No CTMU interrupt occured
bit 2
CCP2IF: ECCP2 Interrupt Flag bit
Capture mode:
1 = A TMR register capture occurred (must be cleared in software)
0 = No TMR register capture occurred
Compare mode:
1 = A TMR register compare match occurred (must be cleared in software)
0 = No TMR register compare match occurred
PWM mode:
Unused in this mode.
bit 1
CCP1IF: ECCP1 Interrupt Flag bit
Capture mode:
1 = A TMR register capture occurred (must be cleared in software)
0 = No TMR register capture occurred
Compare mode:
1 = A TMR register compare match occurred (must be cleared in software)
0 = No TMR register compare match occurred
PWM mode:
Unused in this mode.
bit 0
RTCCIF: RTCC Interrupt Flag bit
1 = RTCC interrupt occured (must be cleared in software)
0 = No RTCC interrupt occured
DS39960B-page 146
Preliminary
 2010 Microchip Technology Inc.