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PIC18F87K22 Datasheet, PDF (260/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology
PIC18F87K22 FAMILY
20.1 ECCP Outputs and Configuration
The Enhanced CCP module may have up to four PWM
outputs, depending on the selected operating mode.
The CCPxCON register is modified to allow control
over four PWM outputs: ECCPx/PxA, PxB, PxC and
PxD. Applications can use one, two or four of these
outputs.
The outputs that are active depend on the ECCP
operating mode selected. The pin assignments are
summarized in Table 20-3.
To configure the I/O pins as PWM outputs, the proper
PWM mode must be selected by setting the PxM<1:0>
and CCPxM<3:0> bits. The appropriate TRIS direction
bits for the port pins must also be set as outputs.
20.1.1
ECCP MODULE AND TIMER
RESOURCES
The ECCP modules use Timers, 1, 2, 3, 4, 6, 8, 10 or 12,
depending on the mode selected. These timers are
available to CCP modules in Capture, Compare or PWM
modes, as shown in Table 20-1.
TABLE 20-1: ECCP MODE – TIMER
RESOURCE
ECCP Mode
Timer Resource
Capture
Compare
PWM
Timer1 or Timer3
Timer1 or Timer3
Timer2, Timer4, Timer6, Timer8,
Timer10 or Timer12
The assignment of a particular timer to a module is
determined by the Timer to ECCP enable bits in the
CCPTMRSx register (Register 20-2). The interactions
between the two modules are depicted in Figure 20-1.
Capture operations are designed to be used when the
timer is configured for Synchronous Counter mode.
Capture operations may not work as expected if the
associated timer is configured for Asynchronous Counter
mode.
20.1.2 ECCP PIN ASSIGNMENT
The pin assignment for ECCPx (Capture input, Com-
pare and PWM output) can change, based on device
configuration. The ECCPMX (CONFIG3H<1>) Config-
uration bit determines to which pin ECCP1 and ECCP3
are multiplexed.
• Default/ECCPMX = 1:
- ECCP1 (P1B/P1C) multiplexed onto RE6 and
RE5
- ECCP3 (P3B/P3C) multiplexed onto RE4 and
RE3
• ECCPMX = 0:
- ECCP1 (P1B/P1C) multiplexed onto RH7
and RH6
- ECCP3 (P3B/P3C) multiplexed onto RH5
and RH4.
The pin assignment for ECCP2 (Capture input,
Compare and PWM output) can change, based on the
device configuration.
The CCP2MX Configuration bit (CONFIG3H<0>)
determines to which pin ECCP2 is multiplexed.
• If CCP2MX = 1 (default) – ECCP2 is multiplexed
to RC1
• If CCP2MX = 0 – ECCP2 is multiplexed to RE7
DS39960B-page 260
Preliminary
 2010 Microchip Technology Inc.