PIC18F87K22 Datasheet, PDF(80/548 Page) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

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PIC18F87K22 Datasheet, PDF (80/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

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PIC18F87K22 FAMILY

TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets,

WDT Reset,

RESET Instruction,

Stack Resets,

CM Resets

Wake-up via WDT

or Interrupt

IPR3

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1-11 1111

1-11 1111

u-uu uuuu

PIR3

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0-00 0000

0-00 0000

u-uu uuuu

PIE3

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0-00 0000

0-00 0000

u-uu uuuu

IPR2

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1-11 1111

1-11 1111

u-uu uuuu

PIR2

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0-00 0000

0-00 0000

u-uu uuuu

PIE2

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0-00 0000

0-00 0000

u-uu uuuu

IPR1

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1111 1111

1111 1111

uuuu uuuu

PIR1

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0000 0000

0000 0000

uuuu uuuu

PIE1

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0000 0000

0000 0000

uuuu uuuu

PSTR1CON PIC18F6XK22 PIC18F8XK22

00-0 0001

00-0 0001

uu-u uuuu

OSCTUNE

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0000 0000

0000 0000

uuuu uuuu

TRISJ

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1111 1111

1111 1111

uuuu uuuu

TRISH

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1111 1111

1111 1111

uuuu uuuu

TRISG

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---1 1111

---1 1111

---u uuuu

TRISF

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1111 111-

1111 111-

---u uuuu

TRISE

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1111 1111

1111 1111

uuuu uuuu

TRISD

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1111 1111

1111 1111

uuuu uuuu

TRISC

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1111 1111

1111 1111

uuuu uuuu

TRISB

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1111 1111

1111 1111

uuuu uuuu

TRISA

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1111 1111

1111 1111

uuuu uuuu

LATJ

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xxxx xxxx

uuuu uuuu

uuuu uuuu

LATH

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xxxx xxxx

uuuu uuuu

uuuu uuuu

LATG

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---x xxxx

---u uuuu

---u uuuu

LATF

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xxxx xxx-

uuuu uuu-

uuuu uuu-

LATE

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xxxx xxxx

uuuu uuuu

uuuu uuuu

LATD

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xxxx xxxx

uuuu uuuu

uuuu uuuu

LATC

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xxxx xxxx

uuuu uuuu

uuuu uuuu

LATB

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xxxx xxxx

uuuu uuuu

uuuu uuuu

LATA

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xxxx xxxx

uuuu uuuu

uuuu uuuu

PORTJ

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xxxx xxxx

xxxx xxxx

uuuu uuuu

PORTH

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0000 0000

0000 0000

uuuu uuuu

PORTG

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--x0 000x

--x0 000x

--uu uuuu

PORTF

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0000 000-

0000 000-

uuuu uuu-

PORTE

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xxxx xxxx

xxxx xxxx

uuuu uuuu

PORTD

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xxxx xxxx

xxxx xxxx

uuuu uuuu

Legend:

Note 1:

u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware

stack.

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector

(0008h or 0018h).

3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

4: See Table 5-1 for Reset value for specific condition.

DS39960B-page 80

Preliminary

ï£ 2010 Microchip Technology Inc.

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