PIC18F87K22 Datasheet, PDF(324/548 Page) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

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PIC18F87K22 Datasheet, PDF (324/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

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PIC18F87K22 FAMILY

TABLE 21-4: REGISTERS ASSOCIATED WITH I2Câ¢ OPERATION

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

INTCON

GIE/GIEH PEIE/GIEL TMR0IE INT0IE

RBIE

TMR0IF INT0IF

RBIF

PIR1

PSPIF

ADIF

RC1IF

TX1IF

SSP1IF TMR1GIF TMR2IF TMR1IF

PIE1

PSPIE

ADIE

RC1IE

TX1IE

SSP1IE TMR1GIE TMR2IE TMR1IE

IPR1

PSPIP

ADIP

RC1IP

TX1IP

SSP1IP TMR1GIP TMR2IP TMR1IP

PIR2

OSCFIF

â

SSP2IF BLC2IF BCL1IF HLVDIF TMR3IF TMR3GIF

PIE2

OSCFIE

â

SSP2IE BLC2IE BCL1IE HLVDIE TMR3IE TMR3GIE

IPR2

OSCFIP

â

SSP2IP BLC2IP BCL1IP HLVDIP TMR3IP TMR3GIP

PIR3

TMR5GIF

â

RC2IF

TX2IF

CTMUIF CCP2IF CCP1IF RTCCIF

PIE3

TMR5GIE

â

RC2IE

TX2IE

CTMUIE CCP2IE CCP1IE RTCCIE

IPR3

TMR5GIP

â

RC2IP

TX2IP

CTMUIP CCP2IP CCP1IP RTCCIP

TRISC

TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0

TRISD

TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0

SSP1BUF

SSP1ADD

SSP1MSK(1)

MSSP1 Receive Buffer/Transmit Register

MSSP1 Address Register (I2Câ¢ Slave mode),

MSSP1 Baud Rate Reload Register (I2C Master mode)

MSK7

MSK6

MSK5

MSK4

MSK3

MSK2

MSK1

MSK0

SSP1CON1 WCOL SSPOV SSPEN

CKP

SSPM3 SSPM2 SSPM1 SSPM0

SSP1CON2

GCEN

GCEN

ACKSTAT ACKDT ACKEN

RCEN

PEN

RSEN

ACKSTAT ADMSK5(2) ADMSK4(2) ADMSK3(2) ADMSK2(2) ADMSK1(2)

SEN

SEN

SSP1STAT

SMP

CKE

D/A

P

S

R/W

UA

BF

SSP2BUF

SSP2ADD

SSP2MSK(1)

MSSP2 Receive Buffer/Transmit Register

MSSP2 Address Register (I2C Slave mode),

MSSP2 Baud Rate Reload Register (I2C Master mode)

MSK7

MSK6

MSK5

MSK4

MSK3

MSK2

MSK1

MSK0

SSP2CON1 WCOL SSPOV SSPEN

CKP

SSPM3 SSPM2 SSPM1 SSPM0

SSP2CON2

GCEN

GCEN

ACKSTAT ACKDT ACKEN

RCEN

PEN

RSEN

ACKSTAT ADMSK5(2) ADMSK4(2) ADMSK3(2) ADMSK2(2) ADMSK1(2)

SEN

SEN

SSP2STAT

SMP

CKE

D/A

P

S

R/W

UA

BF

PMD0

Legend:

Note 1:

2:

CCP3MD CCP2MD CCP1MD UART2MD UART1MD SSP2MD SSP1MD ADCMD

â = unimplemented, read as â0â. Shaded cells are not used by the MSSP module in I2Câ¢ mode.

SSPxMSK shares the same address in SFR space as SSPxADD, but is only accessible in certain I2Câ¢

Slave operating modes in 7-Bit Masking mode. See Section 21.4.3.4 â7-Bit Address Masking Modeâ for

more details.

Alternate bit definitions for use in I2C Slave mode operations only.

DS39960B-page 324

Preliminary

ï£ 2010 Microchip Technology Inc.

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