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PIC18F87K22 Datasheet, PDF (119/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology
PIC18F87K22 FAMILY
8.0 EXTERNAL MEMORY BUS
Note: The external memory bus is not
implemented on 64-pin devices.
The External Memory Bus (EMB) allows the device to
access external memory devices (such as Flash,
EPROM or SRAM) as program or data memory. It
supports both 8 and 16-Bit Data Width modes and
three address widths of up to 20 bits.
The bus is implemented with 28 pins, multiplexed
across four I/O ports. Three ports (PORTD, PORTE
and PORTH) are multiplexed with the address/data bus
for a total of 20 available lines, while PORTJ is
multiplexed with the bus control signals.
A list of the pins and their functions is provided in
Table 8-1.
TABLE 8-1: PIC18F87K22 FAMILY EXTERNAL BUS – I/O PORT FUNCTIONS
Name
Port
Bit
External Memory Bus Function
RD0/AD0
RD1/AD1
RD2/AD2
RD3/AD3
RD4/AD4
RD5/AD5
RD6/AD6
RD7/AD7
RE0/AD8
RE1/AD9
RE2/AD10
RE3/AD11
RE4/AD12
RE5/AD13
RE6/AD14
RE7/AD15
RH0/A16
RH1/A17
RH2/A18
RH3/A19
RJ0/ALE
RJ1/OE
PORTD
PORTD
PORTD
PORTD
PORTD
PORTD
PORTD
PORTD
PORTE
PORTE
PORTE
PORTE
PORTE
PORTE
PORTE
PORTE
PORTH
PORTH
PORTH
PORTH
PORTJ
PORTJ
0 Address bit 0 or Data bit 0
1 Address bit 1 or Data bit 1
2 Address bit 2 or Data bit 2
3 Address bit 3 or Data bit 3
4 Address bit 4 or Data bit 4
5 Address bit 5 or Data bit 5
6 Address bit 6 or Data bit 6
7 Address bit 7 or Data bit 7
0 Address bit 8 or Data bit 8
1 Address bit 9 or Data bit 9
2 Address bit 10 or Data bit 10
3 Address bit 11 or Data bit 11
4 Address bit 12 or Data bit 12
5 Address bit 13 or Data bit 13
6 Address bit 14 or Data bit 14
7 Address bit 15 or Data bit 15
0 Address bit 16
1 Address bit 17
2 Address bit 18
3 Address bit 19
0 Address Latch Enable (ALE) Control pin
1 Output Enable (OE) Control pin
RJ2/WRL
PORTJ
2 Write Low (WRL) Control pin
RJ3/WRH
RJ4/BA0
PORTJ
PORTJ
3 Write High (WRH) Control pin
4 Byte Address bit 0 (BA0)
RJ5/CE
PORTJ
5 Chip Enable (CE) Control pin
RJ6/LB
PORTJ
6 Lower Byte Enable (LB) Control pin
RJ7/UB
PORTJ
7 Upper Byte Enable (UB) Control pin
Note: For the sake of clarity, only I/O port and external bus assignments are shown here. One or more additional
multiplexed features may be available on some pins.
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 119