PIC18F87K22 Datasheet, PDF (117/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
EXAMPLE 7-3: WRITING TO FLASH PROGRAM MEMORY
MOVLW SIZE_OF_BLOCK
MOVWF COUNTER
MOVLW BUFFER_ADDR_HIGH
MOVWF FSR0H
MOVLW BUFFER_ADDR_LOW
MOVWF FSR0L
MOVLW CODE_ADDR_UPPER
MOVWF TBLPTRU
MOVLW CODE_ADDR_HIGH
MOVWF TBLPTRH
MOVLW CODE_ADDR_LOW
MOVWF TBLPTRL
READ_BLOCK
TBLRD*+
MOVF TABLAT, W
MOVWF POSTINC0
DECFSZ COUNTER
BRA
READ_BLOCK
MODIFY_WORD
MOVLW DATA_ADDR_HIGH
MOVWF FSR0H
MOVLW DATA_ADDR_LOW
MOVWF FSR0L
MOVLW NEW_DATA_LOW
MOVWF POSTINC0
MOVLW NEW_DATA_HIGH
MOVWF INDF0
ERASE_BLOCK
MOVLW CODE_ADDR_UPPER
MOVWF TBLPTRU
MOVLW CODE_ADDR_HIGH
MOVWF TBLPTRH
MOVLW CODE_ADDR_LOW
MOVWF TBLPTRL
BSF
EECON1, EEPGD
BCF
EECON1, CFGS
BSF
EECON1, WREN
BSF
EECON1, FREE
BCF
INTCON, GIE
MOVLW 0x55
Required
MOVWF EECON2
Sequence
MOVLW 0xAA
MOVWF EECON2
BSF
EECON1, WR
BSF
INTCON, GIE
TBLRD*-
MOVLW BUFFER_ADDR_HIGH
MOVWF FSR0H
MOVLW BUFFER_ADDR_LOW
MOVWF FSR0L
WRITE_BUFFER_BACK
MOVLW SIZE_OF_BLOCK
MOVWF COUNTER
WRITE_BYTE_TO_HREGS
MOVFF POSTINC0, WREG
MOVWF TABLAT
TBLWT+*
DECFSZ COUNTER
BRA
WRITE_BYTE_TO_HREGS
; number of bytes in erase block
; point to buffer
; Load TBLPTR with the base
; address of the memory block
; read into TABLAT, and inc
; get data
; store data
; done?
; repeat
; point to buffer
; update buffer word
; load TBLPTR with the base
; address of the memory block
; point to Flash program memory
; access Flash program memory
; enable write to memory
; enable Row Erase operation
; disable interrupts
; write 55h
; write 0AAh
; start erase (CPU stall)
; re-enable interrupts
; dummy read decrement
; point to buffer
; number of bytes in holding register
; get low byte of buffer data
; present data to table latch
; write data, perform a short write
; to internal TBLWT holding register.
; loop until buffers are full
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 117