PIC18F87K22 Datasheet, PDF (213/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
16.2 Timer3/5/7 Operation
Timer3, Timer5 and Timer7 can operate in these
modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
• Timer with Gated Control
FIGURE 16-1:
Timer3/5/7 BLOCK DIAGRAM
The operating mode is determined by the clock select
bits, TMRxCSx (TxCON<7:6>). When the TMRxCSx bits
are cleared (= 00), Timer3/5/7 increments on every inter-
nal instruction cycle (FOSC/4). When TMRxCSx = 01, the
Timer3/5/7 clock source is the system clock (FOSC), and
when it is ‘10’, Timer3/5/7 works as a counter from the
external clock from the TxCKI pin (on the rising edge after
the first falling edge) or the SOSC oscillator.
T3GSS<1:0>
T3G
00
T3GSPM
From TMR4
01
Match PR4
From Comparator 1
Output
10
From Comparator 2
Output
11
T3GPOL
T3G_IN
TMR3ON
T3GTM
DQ
CK ^Q
R
Set flag bit
TMR3IF on
Overflow
TMR3⁽²⁾
TMR3H
TMR3L
0
Single Pulse
1
Acq. Control
T3GGO/T3DONE
0
T3GVAL _{D Q}
1
Q1 EN
Interrupt
det
TMR3ON
TMR3GE
EN
T3CLK
0
QD
Synchronized
Clock Input
Data Bus
RD
T3GCON
Set
TMR3GIF
1
SOSCO/SCLKI
OUT⁽⁴⁾
TMR3CS<1:0>
T3SYNC
SOSCI
T1CON.SOSCEN
T3CON.SOSCEN
SOSCGO
SCS<1:0> = 01
T3CKI
SOSC
EN
(1)
Prescaler
Synchronize⁽³⁾
1
1, 2, 4, 8
det
10
2
0
FOSC
T3CKPS<1:0>
Internal ⁰¹
Clock
FOSC/4
Internal ⁰⁰
FOSC/2
Internal
Clock
Sleep Input
Clock
Note 1:
2:
3:
4:
ST Buffer is high-speed type when using T3CKI.
Timer3 registers increment on rising edge.
Synchronization does not operate while in Sleep.
The output of SOSC is determined by the SOSCSEL<1:0> Configuration bits.
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 213