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PIC18F87K22 Datasheet, PDF (535/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology
PIC18F87K22 FAMILY
D
Data Addressing Modes.................................................... 103
Comparing Addressing Modes with the
Extended Instruction Set Enabled .................... 107
Direct......................................................................... 103
Indexed Literal Offset................................................ 106
BSR .................................................................. 108
Instructions Affected ......................................... 106
Mapping Access Bank ...................................... 108
Indirect ...................................................................... 103
Inherent and Literal ................................................... 103
Data EEPROM
Code Protection ........................................................ 427
Data EEPROM Memory
Associated Registers ................................................ 136
EEADR and EEADRH Registers .............................. 131
EECON1 and EECON2 Registers ............................ 131
Operation During Code-Protect ................................ 135
Overview ................................................................... 131
Reading..................................................................... 133
Spurious Write Protection ......................................... 135
Using......................................................................... 135
Write Verify ............................................................... 133
Writing....................................................................... 133
Data Memory ...................................................................... 92
Access Bank ............................................................... 94
Bank Select Register (BSR)........................................ 92
Extended Instruction Set........................................... 106
General Purpose Registers......................................... 94
Memory Maps
PIC18FX5K22/X7KJ22 Devices ......................... 93
Special Function Registers ................................. 95
Special Function Registers ......................................... 95
DAW.................................................................................. 448
DC Characteristics ............................................................ 495
Power-Down and Supply Current ............................. 486
Supply Voltage.......................................................... 485
DCFSNZ ........................................................................... 449
DECF ................................................................................ 448
DECFSZ............................................................................ 449
Default System Clock.......................................................... 47
Details on Individual Family Members ................................ 11
Development Support ....................................................... 479
Device Overview ................................................................... 9
Features (64-Pin Devices) .......................................... 12
Features (80-Pin Devices) .......................................... 12
Direct Addressing.............................................................. 104
E
Effect on Standard PIC18 Instructions .............................. 476
Effects of Power-Managed Modes on Various
Clock Sources............................................................. 53
Electrical Characteristics................................................... 483
Enhanced Capture/Compare/PWM (ECCP) ..................... 257
Capture Mode. See Capture.
Compare Mode. See Compare.
ECCP Mode and Timer Resources........................... 260
Enhanced PWM Mode.............................................. 263
Auto-Restart ..................................................... 272
Auto-Shutdown ................................................. 270
Direction Change in Full-Bridge
Output Mode............................................. 269
Full-Bridge Application...................................... 267
Full-Bridge Mode .............................................. 267
Half-Bridge Application ..................................... 266
Half-Bridge Application Examples .................... 273
Half-Bridge Mode.............................................. 266
Output Relationships (Active-High and
Active-Low)............................................... 264
Output Relationships Diagram.......................... 265
Programmable Dead-Band Delay..................... 273
Shoot-Through Current..................................... 273
Start-up Considerations.................................... 270
Outputs and Configuration........................................ 260
Enhanced Capture/Compare/PWM (ECCP) and
Timer1/2/3/4/6/8/10/12
Associated Registers................................................ 277
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART). See EUSART.
Equations
A/D Acquisition Time ................................................ 359
A/D Minimum Charging Time ................................... 359
Calculating the Minimum Required
Acquisition Time ............................................... 359
Errata .................................................................................... 8
EUSART
Asynchronous Mode................................................. 335
12-Bit Break Transmit and Receive.................. 342
Associated Registers, Receive......................... 339
Associated Registers, Transmit........................ 337
Auto-Wake-up on Sync Break .......................... 340
Receiver ........................................................... 338
Setting Up 9-Bit Mode with
Address Detect......................................... 338
Transmitter ....................................................... 335
Baud Rate Generator
Operation in Power-Managed Mode................. 329
Baud Rate Generator (BRG) .................................... 329
Associated Registers........................................ 330
Auto-Baud Rate Detect..................................... 333
Baud Rate Error, Calculating............................ 330
Baud Rates, Asynchronous Modes .................. 331
High Baud Rate Select (BRGH Bit) .................. 329
Sampling .......................................................... 329
Synchronous Master Mode....................................... 343
Associated Registers, Receive......................... 346
Associated Registers, Transmit........................ 344
Reception ......................................................... 345
Transmission .................................................... 343
Synchronous Slave Mode......................................... 347
Associated Registers, Receive......................... 348
Associated Registers, Transmit........................ 347
Reception ......................................................... 348
Transmission .................................................... 347
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 535