PIC18F87K22 Datasheet, PDF (82/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Wake-up via WDT
or Interrupt
RTCCFG
PIC18F6XK22 PIC18F8XK22
0-00 0000
u-uu uuuu
u-uu uuuu
RTCCAL
PIC18F6XK22 PIC18F8XK22
0000 0000
uuuu uuuu
uuuu uuuu
RTCVALH
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
RTCVALL
PIC18F6XK22 PIC18F8XK22
0000 0000
uuuu uuuu
uuuu uuuu
ALRMCFG
PIC18F6XK22 PIC18F8XK22
0000 0000
uuuu uuuu
uuuu uuuu
ALRMRPT
PIC18F6XK22 PIC18F8XK22
0000 0000
uuuu uuuu
uuuu uuuu
ALRMVALH
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
ALRMVALL
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CTMUCONH PIC18F6XK22 PIC18F8XK22
0-00 0000
0-00 0000
u-uu uuuu
CTMUCONL PIC18F6XK22 PIC18F8XK22
0000 00xx
0000 00xx
uuuu uuuu
CTMUICONH PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
CM1CON
PIC18F6XK22 PIC18F8XK22
0001 1111
0001 1111
uuuu uuuu
PADCFG1
PIC18F6XK22 PIC18F8XK22
--0- -00-
--u- -uu-
--u- -uu-
PADCFG1
PIC18F6XK22 PIC18F8XK22
000- -00-
uuu- -uu-
uuu- -uu-
ECCP2AS
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
ECCP2DEL
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
CCPR2H
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR2L
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP2CON
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
ECCP3AS
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
ECCP3DEL
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
CCPR3H
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR3L
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP3CON
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
CCPR8H
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR8L
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP8CON
PIC18F6XK22 PIC18F8XK22
--00 0000
--00 0000
--uu uuuu
CCPR9H
PIC18F66K22 PIC18F86K22
PIC18F67K22 PIC18F87K22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR9L
PIC18F66K22 PIC18F86K22
PIC18F67K22 PIC18F87K22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP9CON
PIC18F66K22 PIC18F86K22
PIC18F67K22 PIC18F87K22
--00 0000
--00 0000
--uu uuuu
CCPR10H
PIC18F66K22 PIC18F86K22
PIC18F67K22 PIC18F87K22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR10L
PIC18F66K22 PIC18F86K22
PIC18F67K22 PIC18F87K22
xxxx xxxx
uuuu uuuu
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
See Table 5-1 for Reset value for specific condition.
DS39960B-page 82
Preliminary
 2010 Microchip Technology Inc.