PIC18F87K22 Datasheet, PDF(261/548 Page) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

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PIC18F87K22 Datasheet, PDF (261/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

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20.2 Capture Mode

In Capture mode, the CCPRxH:CCPRxL register pair

captures the 16-bit value of the TMR1 or TMR3

registers when an event occurs on the corresponding

ECCPx pin. An event is defined as one of the following:

â¢ Every falling edge

â¢ Every rising edge

â¢ Every fourth rising edge

â¢ Every 16th rising edge

The event is selected by the mode select bits,

CCPxM<3:0> (CCPxCON<3:0>). When a capture is

made, the interrupt request flag bit, CCPxIF, is set (see

Table 20-2). The flag must be cleared by software. If

another capture occurs before the value in the

CCPRxH/L register is read, the old captured value is

overwritten by the new captured value.

TABLE 20-2: ECCP1/2/3 INTERRUPT FLAG

BITS

ECCP Module

Flag Bit

1

PIR3<1>

2

PIR3<2>

3

PIR4<0>

20.2.1 ECCP PIN CONFIGURATION

In Capture mode, the appropriate ECCPx pin should be

configured as an input by setting the corresponding

TRIS direction bit.

Note:

If the ECCPx pin is configured as an out-

put, a write to the port can cause a capture

condition.

20.2.2

TIMER1/2/3/4/6/8/10/12 MODE

SELECTION

The timers that are to be used with the capture feature

(Timer1 2, 3, 4, 6, 8, 10 or 12) must be running in Timer

mode or Synchronized Counter mode. In Asynchro-

nous Counter mode, the capture operation may not

work. The timer to be used with each ECCP module is

selected in the CCPTMRS0 register (Register 20-2).

20.2.3 SOFTWARE INTERRUPT

When the Capture mode is changed, a false capture

interrupt may be generated. The user should keep the

CCPxIE interrupt enable bit clear to avoid false interrupts.

The interrupt flag bit, CCPxIF, should also be cleared

following any such change in operating mode.

20.2.4 ECCP PRESCALER

There are four prescaler settings in Capture mode; they

are specified as part of the operating mode selected by

the mode select bits (CCPxM<3:0>). Whenever the

ECCP module is turned off, or Capture mode is dis-

abled, the prescaler counter is cleared. This means

that any Reset will clear the prescaler counter.

Switching from one capture prescaler to another may

generate an interrupt. Also, the prescaler counter will

not be cleared; therefore, the first capture may be from

a non-zero prescaler. Example 20-1 provides the

recommended method for switching between capture

prescalers. This example also clears the prescaler

counter and will not generate the âfalseâ interrupt.

EXAMPLE 20-1: CHANGING BETWEEN

CAPTURE PRESCALERS

CLRF

MOVLW

MOVWF

CCP1CON

; Turn ECCP module off

NEW_CAPT_PS ; Load WREG with the

; new prescaler mode

; value and ECCP ON

CCP1CON

; Load CCP1CON with

; this value

FIGURE 20-1:

CAPTURE MODE OPERATION BLOCK DIAGRAM

ECCP1 Pin

Prescaler

ï¸ 1, 4, 16

CCP1CON<3:0>

Q1:Q4

Set CCP1IF C1TSEL0

C1TSEL1

C1TSEL2

and

Edge Detect

C1TSEL0

C1TSEL1

C1TSEL2

4

4

TMR3H

TMR3L

TMR3

Enable

CCPR1H CCPR1L

TMR1

Enable

TMR1H TMR1L

ï£ 2010 Microchip Technology Inc.

Preliminary

DS39960B-page 261

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