PIC18F87K22 Datasheet, PDF (81/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Wake-up via WDT
or Interrupt
PORTC
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTB
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTA
PIC18F6XK22 PIC18F8XK22
xx0x 0000
uu0u 0000
uuuu uuuu
EECON1
PIC18F6XK22 PIC18F8XK22
xx-0 x000
uu-0 u000
uu-u uuuu
EECON2
PIC18F6XK22 PIC18F8XK22
---- ----
---- ----
---- ----
TMR5H
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR5L
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
T5CON
PIC18F6XK22 PIC18F8XK22
0000 0000
uuuu uuuu
uuuu uuuu
T5GCON
PIC18F6XK22 PIC18F8XK22
0000 0x00
uuuu uuuu
uuuu uuuu
CCPR4H
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR4L
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP4CON
PIC18F6XK22 PIC18F8XK22
--00 0000
--00 0000
--uu uuuu
CCPR5H
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR5L
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP5CON
PIC18F6XK22 PIC18F8XK22
--00 0000
--00 0000
--uu uuuu
CCPR6H
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR6L
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP6CON
PIC18F6XK22 PIC18F8XK22
--00 0000
--00 0000
--uu uuuu
CCPR7H
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR7L
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP7CON
PIC18F6XK22 PIC18F8XK22
--00 0000
--00 0000
--uu uuuu
TMR4
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
PR4
PIC18F6XK22 PIC18F8XK22
1111 1111
1111 1111
1111 1111
T4CON
PIC18F6XK22 PIC18F8XK22
-000 0000
-000 0000
-uuu uuuu
SSP2BUF
PIC18F6XK22 PIC18F8XK22
xxxx xxxx
uuuu uuuu
uuuu uuuu
SSP2ADD
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
SSP2STAT
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
SSP2CON1
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
SSP2CON2
PIC18F6XK22 PIC18F8XK22
0100 0000
0000 0000
uuuu uuuu
BAUDCON1 PIC18F6XK22 PIC18F8XK22
0100 0-00
0100 0-00
uuuu u-uu
OSCCON2
PIC18F6XK22 PIC18F8XK22
-0-- 0-x0
-0-- 0-u0
-u-- u-uu
EEADRH
PIC18F6XK22 PIC18F8XK22
---- --00
---- --00
---- --uu
EEADR
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
EEDATA
PIC18F6XK22 PIC18F8XK22
0000 0000
0000 0000
uuuu uuuu
PIE6
PIC18F6XK22 PIC18F8XK22
---0 -000
---0 -000
---u -uuu
Legend:
Note 1:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.
 2010 Microchip Technology Inc.
Preliminary
DS39960B-page 81