PIC18F87K22 Datasheet, PDF (148/548 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt XLP Technology

PIC18F87K22 FAMILY
REGISTER 11-8: PIR5: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 5
R/W-0
TMR7GIF⁽¹⁾
bit 7
R/W-0
TMR12IF⁽¹⁾
R/W-0
TMR10IF⁽¹⁾
R/W-0
TMR8IF
R/W-0
TMR7IF⁽¹⁾
R/W-0
TMR6IF
R/W-0
TMR5IF
R/W-0
TMR4IF
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR7GIF: TMR7 Gate Interrupt Flag bits⁽¹⁾
1 = TMR gate interrupt occurred (bit must be cleared in software)
0 = No TMR gate occurred
bit 6
TMR12IF: TMR12 to PR12 Match Interrupt Flag bit⁽¹⁾
1 = TMR12 to PR12 match occurred (must be cleared in software)
0 = No TMR12 to PR12 match occurred
bit 5
TMR10IF: TMR10 to PR10 Match Interrupt Flag bit⁽¹⁾
1 = TMR10 to PR10 match occurred (must be cleared in software)
0 = No TMR10 to PR10 match occurred
bit 4
TMR8IF: TMR8 to PR8 Match Interrupt Flag bit
1 = TMR8 to PR8 match occurred (must be cleared in software)
0 = No TMR8 to PR8 match occurred
bit 3
TMR7IF: TMR7 Overflow Interrupt Flag bit⁽¹⁾
1 = TMR7 register overflowed (must be cleared in software)
0 = TMR7 register did not overflow
bit 2
TMR6IF: TMR6 to PR6 Match Interrupt Flag bit
1 = TMR6 to PR6 match occurred (must be cleared in software)
0 = No TMR6 to PR6 match occurred
bit 1
TMR5IF: TMR5 Overflow Interrupt Flag bit
1 = TMR5 register overflowed (must be cleared in software)
0 = TMR5 register did not overflow
bit 0
TMR4IF: TMR4 to PR4 Match Interrupt Flag bit
1 = TMR4 to PR4 match occurred (must be cleared in software)
0 = No TMR4 to PR4 match occurred
Note 1: Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).
DS39960B-page 148
Preliminary
 2010 Microchip Technology Inc.