GMS30C2216 Datasheet, PDF (81/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Instruction Set
3-19
product is placed in the destination register (the high-order product word is not evaluated)
and the condition flags are set or cleared according to the single-word product.
Both operands are either signed or unsigned integers, the product is a single-word integer.
Note that the low-order word of the product is identical regardless of whether the operands
are signed or unsigned.
The result is undefined if the PC or the SR is denoted.
Format Notation
Operation
RR
MUL Rd, Rs
Rd := low order word of product Rd ∗ Rs;
Z := singleword product = 0;
N := Rd(31);
-- sign of singleword product;
-- valid for signed operands;
V := undefined;
C := undefined;
3.12 Multiply Double-Word Instructions
The source operand and the destination operand are multiplied, the double-word product is
placed in the destination register pair (the destination register expanded by the register
following it) and the condition flags are set or cleared according to the double-word
product.
At MULS, both operands are signed integers and the product is a signed double-word
integer. At MULU, both operands are unsigned integers and the product is an unsigned
double-word integer.
The result is undefined if the PC or the SR is denoted.
Format Notation
Operation
RR
MULS Rd, Rs
Rd//Rdf := signed doubleword product of Rd ∗ Rs;
Z := Rd//Rdf = 0;
-- doubleword product is zero
N := Rd(31);
-- doubleword product is negative
V := undefined;
C := undefined;
RR
MULU Rd, Rs
Rd//Rdf := unsigned doubleword product of Rd ∗ Rs;
Z := Rd//Rdf = 0;
-- doubleword product is zero
N := Rd(31);
V := undefined;
C := undefined;