GMS30C2216 Datasheet, PDF (306/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

A-134
Store Word (post-increment address mode)
Appendix A. Instruction Set Details
STW.P
Format:
LR format
15
OP-code
1101 110
87
43
0
s
Ld-code
Rs-code
s = 0: Rs-code encodes G0..G15 for Rs
s = 1: Rs-code encodes L0..L15 for Rs
Ld-code encodes L0..L15 for Ld
Notation:
STW.P Ld, Rs
Description:
The Store instruction of post-increment address mode transfers data from a register Rs into
the addressed memory location, Ld is used as an address.
The content of the destination register Ld is used as an address into memory address space,
then Ld is incremented according to the specified data size of a word by 4, regardless of
any exception occurring.
Operation:
Ld^ := Rs;
Ld := Ld + 4;
Exceptions:
None.