GMS30C2216 Datasheet, PDF (64/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

3-2
CHAPTER 3
3.1.1 Address Modes
Register Address Mode:
Notation:
LDxx.R,
STxx.R -- xx: word or double word data type
The content of the destination register Ld is used as an address into memory address space.
LDxx.R Ld, Rs
Ld
ADDR
Memory
ADDR DATA
Rs
DATA
STxx.R Ld, Rs
Ld
ADDR
Memory
ADDR DATA
Rs
DATA
Postincrement Address Mode:
Notation:
LDxx.P, STxx.P -- xx: word or double-word data type
The content of the destination register Ld is used as an address into memory address space,
then Ld is incremented according to the specified data size of a word or double-word
memory instruction by 4 or 8 respectively, regardless of any exception occurring. In the
case of a double-word data type, Ld is incremented by 8 at the first memory cycle.
LDxx.P Ld, Rs
Ld
ADDR
Memory
ADDR
ADDR + size
DATA
size= 4(word) or 8(double word)
Rs
DATA
STxx.P Ld, Rs
Ld
ADDR
Memory
ADDR
ADDR + size
DATA
size= 4(word) or 8(double word)
Rs
DATA
Displacement Address Mode:
Notation:
LDxx.D,
STxx.D
-- xx: any data type
The sum of the contents of the destination register Rd plus a signed displacement dis is
used as an address into memory address space.
LDxx.D Rd, Rs, dis
Rd
ADDR
ADDR
Memory
ADDR + dis DATA
Rs
DATA
STxx.D Rd, Rs, dis
Rd
ADDR
ADDR
Memory
ADDR + dis DATA
Rs
DATA
Rd may denote any register except the SR; Rd not denoting the SR differentiates this mode
from the absolute address mode.