GMS30C2216 Datasheet, PDF (284/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

A-112
Shift Right (Signed Single Word)
Appendix A. Instruction Set Details
SAR
Format:
LL format
15
OP-code
1000 0111
7
43
0
Ld-code
Ls-code
Ls-code encodes L0..L15 for Ls
Ld-code encodes L0..L15 for Ld
Notation:
SAR Ld, Ls
Description:
The destination operand is shifted right by a number of bit positions specified by bits 4..0
of the source operand as a shift by 0..31. The higher-order bits of the source operand are
ignored. The destination operand is interpreted as a signed integer.
The Shift Right instruction inserts sign bits in the vacated bit positions at the left.
Operation:
Ld := Ld >> by Ls(4..0);
Z := Ld =0;
N := Ld(31);
C := last bit shifted out is "one"
Exceptions:
None.